It can mean both. More specifically, the paper uses the term "Heterogeneous ISA", which more often refers to when two CPU ISAs are completely different (e.g. AR

It can mean both. More specifically, the paper uses the term "Heterogeneous ISA", which more often refers to when two CPU ISAs are completely different (e.g. ARM vs. x86). The paper does reference previous work in that area, and hints that their system could be used for that, but does not present an example of actually doing it. I've noticed that some other authors prefer to distinguish the two types of "heterogeneous ISA" systems by instead using the term "Partial ISA" when referring to when there is a shared core instruction set.