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Intel and AMD seem to have settled on a large subset of mutually supported AVX-512 instructions (since Ice Lake and Zen 4). https://en.wikipedia.org/wiki/AVX-5
by theandrewbailey 3y ago
Intel and AMD seem to have settled on a large subset of mutually supported AVX-512 instructions (since Ice Lake and Zen 4).
https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512 https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512
- brucethemoose2 3y agoZen 4 is still lacking FP16 instructions Sapphire Rapids has. Someone in the Clear Linux IRC told me that the distro will settle on a new x86 level sometime after Sapphire Rapids, once AVX512 is sufficiently differentionated from the x86-64-v4 AVX512 "baseline." I wonder if this means AMD will follow suit?
- SomeRndName11 3y agoOh yes. FP16 is awesome for machine learning inference-only tasks. No need to fire up GPU, and so much easier to use.
- brucethemoose2 3y agoYeah I didn't mean FP16 specifically, but just that AMD/Intel hopefully won't go out on a limb and try to seriously bifurcate AVX512
- adrian_b 3y agoWhile Zen 4 is lacking the instructions for machine learning added by Sapphire Rapids, which was launched well after Zen 4, it includes the BF16 instructions introduced by Cooper Lake (and also the Vector Neural Network Instructions introduced by Cascade Lake). Zen 4 includes all the AVX-512 instructions that existed at its launch and which had not been already deprecated by Intel (Intel has deprecated some AVX-512 instruction groups provided by Knights Landing and Knights Mill and also one AVX-512 instruction group introduced by Tiger Lake).