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Ask HN: How to start a fabless chip company targeting a modern process node?

17 points by chromoblob 3y ago

Let's say I have an idea for a digital chip that requires a modern semiconductor node (≤10 nm). It seems that the only semiconductor manufacturers that offer such nodes are TSMC, SMIC, Intel, Samsung. Are there others? To assess viability of my idea, I may need to get the process specifications (design rules, defect models, ...), transistor models and standard cell specifications. Does the manufacturer publish these on their website or do you have to ask? What tools are needed to verify a chip design on a level lower than logic? Which proprietary ones? Is the GDSII format still used in these modern nodes? Would you like to recommend any books that cover specifically modern technology processes and designing for them? How to get funding after I get promising simulation results of my design? In which country do I incorporate? My preference is for English-speaking countries and little legal obstacles for doing my own work as a non-citizen. My home country is already ruled out.

GianFabien 3y ago
Seems like a fascinating and extremely challenging undertaking. The most obvious question is whether you have the skills or access to the skills to design a device at that level. AFAIK it would require a team of specialists. Going beyond that, would it be possible to validate the design using FPGA or ASIC? How are you confirming the market reach and size? Since you are looking at a multi-million dollar investment, investors would want to see credible ROI. The execution risks appear to be substantial. That is, unless you have capabilities far beyond those implied by your questions. To answer your last question. I fail to see any better option than the USA. Of course, there are numerous potential legal hurdles depending your current country of domicile. As a minimum you could hasten to Silicon Valley and start building a network of connections. Perhaps there are others on HN who are in a good position to assist.
nm-f 3y ago
From working in a somewhat related discipline, the PDKs for the high end nodes (think tsmc N16 and lower) are quite hard to obtain and require your org to pass security audit. In addition to that the cadence licenses are priced very much for a big-org rather than a startup. Does your chip absolutely need a modern node? I'm assuming you've seen the open source skywater pdk, but here it is just in case. https://github.com/google/skywater-pdk https://github.com/google/skywater-pdk
- chromoblob 3y ago
  Thanks. Do you have info about requirements of the security audit and other prerequisites to get the PDKs?
gary_0 3y ago
I'm pretty sure if you can figure out how to arrange the many millions of dollars of funding and hire the various domain experts required to get a cutting-edge (or even last-gen) chip off the ground, your questions would get answered automatically. Which is not to say they're not interesting questions, but the answers will not be actionable information without the aforementioned money and people. It's a bit like a single carpenter asking about how you get a permit to build a skyscraper.
- chromoblob 3y ago
  I need to measure my preliminary design before the moment I ask for money. If I don't, there will be simply no reason to give me the money.
  - c_o_n_v_e_x 3y ago
    To me, it sounds you are going to need money to measure your preliminary design. Investors appreciate taking a methodological approach to raising rounds of money for de-risking, rather than "I need $50mm upfront to do everything." I manage products on the board level, never been down to chip design. Are there design agencies/firms who are familiar with the processes (but are not fabs) that can be engaged to help de-risk your design / assess the manufacture-ability of your chip?
    - chromoblob 3y ago
      I think that the level of expression of my design that will be necessary to pass it to such design agency under the condition of absence of concrete PDKs is so abstract that it will probably be pointless to do this - at this level my design has almost no information and I really don't see that it's wise to make blind preliminary decisions, and I don't want to outsource the work that I could do myself and hold myself accountable. At least I want to make the more concrete (intermediate) design myself from scratch and only then pass it on to experts to elaborate and improve it.
      - c_o_n_v_e_x 3y ago
simne 3y ago
You don't need to make real chip to estimate performance. You just need to make logic model and run it on software FPGA simulator and this will be enough for business plan. So forget nm, just run your idea on simulator, or on big FPGA. Second, in modern world, hardware is only fraction of all costs. The largest part is product package and distribution, plus marketing. Marketing of high tech could easy cost 10x hardware, even 20x is not limit. If separate only production, largest part is software development/support pipeline (2x-5x). Even if you will achieve zero hardware cost, and some way avoid distribution/marketing, there still will be huge expenses on software development/support. Third, even when you will achieve ready product in quantities, you will need to wait few years, so people, will see your product give them advantages (that's why software is 5x hardware). And you are wrong, if think, you could fool investors and jump over some of steps above. As conclusion, focus on create sustainable design/production pipeline, don't focus on low hardware costs. If you will achieve (and show) sustainable design/production pipeline for abstract digital chip, you will got money without chip idea.
- chromoblob 3y ago
  Logic model is not enough. One needs to know the process PDK to estimate performance / power consumption / cost of the chip. What do you mean by "design/production pipeline"?
  - simne 3y ago
    Many people think of product, as achieve Supernova explosion and then just duplicate and sell. In reality, product is lot of Supernova explosions. 1. You make one explosion (yes, its really hard), and deliver results to consumer. 2. You work hard to got ANY breadcrumbs of feedback. 3. You become Buddha of your product, trying to got some enlightenment from feedback. 4. You gather all your thoughts, and return to 1. To make good hardware, you must repeat this steps at least 5 times. But if you have no previous experience, you will 3-5 times make dumb tries, before achieve good repeatability. All semiconductors industry life is just constant repeat-repeat-repeat, sometimes make small advancement.
  - simne 3y ago

chromoblob 3y ago
I played HoMM but failed to understand how to play well.
- simne 3y ago
  Ok. You know, exists different maps. One type of maps called many islands. On island map many things possible to do only on terrain (island), and some things just impossible to do on water. In semiconductors, mono-crystal is like islands - it have perfect parts, and have defects, where 10nm will not work at all. People spent lot of time to figure out, what to do with defects, but complete solution for all cases does not exist. Most know solutions, to make modular structure, so parts appear under defects will just disabled by seals (cut by laser). For example, Intel large die could be with 8 cores, but 2-4 will be disabled after testing, and than will marketed 3 types of CPUs - 4,6 cores (they don't like odd numbers, but I know well, marketed 3-cores CPUs). Other solution, to make few Cache parts considering some disable. RAM/Flash chips nearly all now typically made modular, so they have for example 6 parts in design, but marketed chip will have 2-4 working parts. Latest idea, most successfully used by AMD, to use chiplets - they use two (or more) technologies. From first view could consider chiplet as one core or even one part of chip - Cache or HBM or even Flash. As interposer (base) used something like old 45nm (more tolerate for defects) and on it placed one or more 10nm or better chiplets, connected with TSVs (Throw-Silicon-Via). Chiplets could be placed side-by-side or one on other (I hear about 8-level chips, but sure, for heat consideration in AMD CPU/APU used 2-level design). Interposer could be passive (just pads/wires) or active (some silicone elements or even logic/analog modules). Also exists just classical interposer printed boards, but they are very limited. What I want say, performance of your chip will depend, on how well it suited for anti-defects tricks, such as modular design and/or chiplets design. Unfortunately, silicon interposer technology is very young and not mature, just few months ago appear first industry standard, and just now conducted r&d on Open Source interposer tech. So there are not much to read, but silicon interposer will affect all new designs in very dramatic way. As for me, most revolutionary example, joint venture design, Intel CPU with AMD chiplet GPU (Core i7-8809G with Radeon RX Vega M GH graphics ).
  - chromoblob 3y ago
    Thank you. The game analogy is weird, but okay. I already know the basic bits about defects, but not all details you mentioned.
    - simne 3y ago
      You are welcome. Ask questions, I'm sure you have, and I could answer many (sure not all).
      - chromoblob 3y ago
        Main question I have that is not minor is how to get funding after I have simulations that show my design's merit. I have no such experience at all.
        simne 3y ago
        This is impossible to answer, because investors thinking totally other way. Investor want to see MARKET fit. They are reasonable people, but best you can do, give them formula with good foundations, like: "if on January 10, you invest x1 amount of cash, in x2 days will receive product, which x3 number of people will buy for x4 dollars, before end of year". For example, for Arduino-like products, number of potential customers is just about few millions persons, and it have relatively low barriers for new producers. Because of these characteristics of Arduino-like market, there near impossible to make profitable full scale semiconductor business, as you will need to fight your niche vs many other producers. So ALL Arduino businesses, really use "two-legs" business model, or "many legs", where Arduino product is just one income source and exists one or more other powerful income sources. Other example, Amazon Ring. From first view, they are just digital camera business for very specific niche, not very sophisticated technically. But to defend their market from other producers, they registered somewhere about 80 patents, which tightly cover their niche and some nearest neighbors. Really exists many variants of limitations, which could defend your market from other producers, but this is too broad talk, to speak from what you already tell. So, what I still trying to say - you going wrong way, you need to talk with investors on business language, not technical language.
        simne 3y ago
        Other important thing, nearly all engineers don't understand - good enough service (availability) is more important than design performance. What I mean, imagine, two people created computers. First, created 0.5MIPS, but with excellent service, so people got ready money machine for business, near without outages, lets state something like 99% availability (maximum 14 hours offline per month), which you could just buy when want. Second created 5MIPS (magnitude faster), but cannot produce in quantities, with any problem people must wait 2 weeks or more to got service. Even if second producer marketing his computer with same price as first, but in reality you cannot buy/use it, this means, that second producer will lost his opportunity. This is oversimplified example. In real life appear lot of cases, like Pentium 4, which was technically nightmare, but Intel survive, because have products portfolio, in which P4 was total loss, but others keep company afloat, and because, at the time of P4, from other large CPU vendors, only survived AMD, which was incapable to fill up market, even when Intel fail, so people buy bad P4. Investor want you to prove, that your product will be not just simulation, but that you could someway keep afloat, even in case of huge failure. Second important thing, that you must be ready to scale, if market will grow above expectations. And with semiconductors, this is near impossible in 10nm business, because all Fabs have their own custom solutions to achieve this. Only Intel is legendary, rumors said, they could just copy design to ANY their Fab (not exact, but near to truth, unfortunately also have limitations), and scale near any product on demand. All other manufacturers have extreme troubles when need to "just copy" product to other Fab, they spending months to do this "just copy".