They implemented basic ISA. No virtual memory extensions were implemented. They compared performance of 80486 with their tapeout at 65nm (20 years of technolog

They implemented basic ISA. No virtual memory extensions were implemented. They compared performance of 80486 with their tapeout at 65nm (20 years of technology betterment). Judging from this, I suspect they may introduced long delays into some of the circuitry. They also "cleverly" avoided exponential blow up of any BDD representation by not implementing any multiplier or divider. Their ISA is RISC-V32IA, which does not include multipler.