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Would it be say that they're converging on a particular die size? i.e. CPUs need to be huge to achieve their performance targets, but wafer defects make for po
by myself248 3y ago
Would it be say that they're converging on a particular die size?
i.e. CPUs need to be huge to achieve their performance targets, but wafer defects make for poor margins with chips that large, so they split up into chiplets to allow mixing and matching of good parts.
But SOCs are nowhere near that limit yet, so their tiny dies are growing to bring more more functionality on-die and reap the benefits of integration.
- cubefox 3y agoThat seems plausible, although mobile SoCs are much more optimized for power efficiency (roughly, FLOP per watt), while other chips are more optimized for price/performance (roughly, FLOP/s per chip price). When the latter stops improving, when the cost per transistor goes up, then shrinking structures could still make sense for mobile SoCs, insofar efficiency still improves. This would result in smaller mobile SoCs. But this wouldn't affect other chips which aren't similarly power constrained.
- myself248 3y agoOooo, speaking of power, I've heard a few mentions about the power it takes to move a single bit on-die versus off-die (down in the femtojoules and stuff, but it does add up). I wonder if that's it; simply keeping a PCIe link awake between various chips uses a bit of power to drive the trace capacitance, for instance.