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The last generation was pushing 12 hours on some of my computers. I assume that if you pay for a top-of-the-line server, you can get one of these done in 4-6 ho
by pclmulqdq 3y ago
The last generation was pushing 12 hours on some of my computers. I assume that if you pay for a top-of-the-line server, you can get one of these done in 4-6 hours or so.
- aseipp 3y agoUltraScale+ you mean? Well, the real question is P&R time at some utilization, right? We were easily doing 14hr P&R times on fairly utilized US+ chips like, 5+ years ago. We probably could have improved this in a number of ways, though. I'd honestly think that if you just want to throw money at it, those absurdly-overclocked gamer rigs that can hit sustained +5GHz boosting on just a few cores would be better if you want the fastest P&R times? Cloud servers will probably have more RAM and memory bandwidth but you can shove 128GB of RAM in the 13900K, memory requirements are relatively easy to meet IMO. Synthesis can definitely scale with some more cores in Vivado (OOC synth) but P&R never seemed to scale beyond what you can just get in a desktop. YMMV I guess.
- pclmulqdq 3y agoYeah, I meant Virtex UltraScale+ parts. I hear that there is a small cottage industry of people overclocking Threadripper workstations for FPGA synthesis, because the memory bandwidth is actually the primary limiting factor (and the Threadrippers have the same kind of turbo capability as the gaming rigs). I assume that the "x3D" chips help a lot, but I don't know.
- aseipp 3y agoYeah, you often see it come up in lots of discussions among indies or small teams, since people end up just buying One Server that runs all their builds; I didn't think about AMD's V-Cache though, the 7950X3D is packing 144MB of L3 which would be interesting to test. It would also be interesting to see something at sustained high turbo speeds with a nice, wide LPDDR5X bus like Apple has done, too.
- rcxdude 3y agoThis is basically the approach I've used. you want good memory bandwidth and latency as well as good single-threaded performance over lots of ram and lots of cores, which is what server-grade hardware optimises for. The main concern with really pushing it is the risk of transient errors causing faulty output.
- miga 3y agoWhat about upload time? Is it possible to upload just a small bugfix to bitstream?
- aseipp 3y agoProgramming time isn't exactly instantaneous or fast on these; SRAM cells need to all be programmed to the proper value for every LUT (2^k SRAM cells needed for a single k-LUT; k = 6 in this case), and that typically is either done online (JTAG) or through attached flash which is read on startup and/or specific commands. If you want to upload a small bugfix without it taking 10+ hours, you need to floorplan your design and use "partial reconfiguration" techniques in order to change only part of the bitstream at a time. This requires a more advanced design flow and a bit more work, but is necessary for things like multi-tenancy or lowering turnaround times.