3 ms·

For starters, I doubt that acting as a NVMe device is something you can do with a off the self "inexpensive RISC-V" with any kind of acceptable performance. A N

by dezgeg 3y ago

For starters, I doubt that acting as a NVMe device is something you can do with a off the self "inexpensive RISC-V" with any kind of acceptable performance. A NVME engine would almost certainly be something that the flash controller would have implemented in fixed function hardware. Also NAND flash practically requires some sort of error correction system - another thing that fixed function logic in a custom ASIC is very well suited for. Using CPU time on the host CPU for that would probably suck.

AnthonyMouse 3y ago
The basic function of transferring data between the flash chips and the PCIe bus shouldn't be a bottleneck. Dedicated silicon for error correction might be more efficient, but when there are already fast idle CPU cores it may not matter, and ECC algorithms can already be accelerated by SIMD instructions. Or for high performance machines add the dedicated silicon to the host CPU.
- dezgeg 3y ago
  These kind of high speed interfaces aren't just something that one just bitbangs on some microcontroller. I think even the first step, ie. finding a RISC-V chip that has capability of acting as a PCIe device at all will be a challenge. "Inexpensive" for sure not.
  - AnthonyMouse 3y ago
    There are RISC-V chips with PCIe controllers on them. I'm not sure if you can use the hardware designed to act as a host to act as a device, but it wouldn't surprise me. In any case I would find it hard to believe that the hardware that can act as a device would cost significantly more. You can get a whole NVMe SSD for $15: https://www.newegg.com/silicon-power-128gb-p34a60/p/N82E16820301475?Item=N82E16820301475 https://www.newegg.com/silicon-power-128gb-p34a60/p/N82E1682... The hardware required to do this can't be that expensive.
    - dezgeg 3y ago
      > I'm not sure if you can use the hardware designed to act as a host to act as a device, but it wouldn't surprise me. I don't how it is for PCIe, but for example USB is very asymmetric and host controllers generally cannot as devices. There do exist dual-mode IP cores (e.g. for mobile SoCs) > In any case I would find it hard to believe that the hardware that can act as a device would cost significantly more. Indeed the area/cost difference between host-only and dual mode controller may be small. But in a general purpose chip there will be dozens of other competiting features in all the other subsystems besides PCIe. Each of those small features would increase the chip cost, so they won't be added without a cost-benefit calculation. So it can still be that while PCIe device support would be cheap to add, it could still be considered too low bang-for-buck to be worth including. Or that there may be such chips supporting PCIe device mode, but they then also would include things like video encoding/decoding, HDMI, ethernet, etc. and thus be an expensive chip. > The hardware required to do this can't be that expensive. With a custom ASIC (the linked one seems to have Phison E12) that includes only the minimal needed hardware, yes.
snvzz 3y ago
>RISC-V in charge of NAND storage, presenting NVMe (or SATA) interface. Aren't WD SSDs just that?
- dezgeg 3y ago
  No, they are not just a converter that exposes raw NAND to your PC. Rather they abstract away all the details of how painful raw NAND is to deal with into simple "read/write sectors" interface that all your normal filesystems like ext4, NTFS, etc. deal with. Raw NAND comes with various pain-in-the-ass limitations such as: only erasable in huge (~megabytes) blocks at a time, only writable in slightly-uncomfortably-big chunks (like 32KB or so), and erasing a given region can be done a limited amount of times before it breaks. Oh, and all those details (like exact sizes of erases and writes) will change time to time as manufacturing processes of NAND dies get more advanced.
  - AnthonyMouse 3y ago
    That's software, not hardware. And operating systems have long dealt with things like variable sector sizes. You want the abstraction layer. What you don't want is for it to be a black box, and what you shouldn't care about is whether the silicon that runs the code is soldered to the flash chips or not.

by dezgeg 3y ago

AnthonyMouse 3y ago

The basic function of transferring data between the flash chips and the PCIe bus shouldn't be a bottleneck. Dedicated silicon for error correction might be more efficient, but when there are already fast idle CPU cores it may not matter, and ECC algorithms can already be accelerated by SIMD instructions. Or for high performance machines add the dedicated silicon to the host CPU.

dezgeg 3y ago
These kind of high speed interfaces aren't just something that one just bitbangs on some microcontroller. I think even the first step, ie. finding a RISC-V chip that has capability of acting as a PCIe device at all will be a challenge. "Inexpensive" for sure not.
- AnthonyMouse 3y ago
  There are RISC-V chips with PCIe controllers on them. I'm not sure if you can use the hardware designed to act as a host to act as a device, but it wouldn't surprise me. In any case I would find it hard to believe that the hardware that can act as a device would cost significantly more. You can get a whole NVMe SSD for $15: https://www.newegg.com/silicon-power-128gb-p34a60/p/N82E16820301475?Item=N82E16820301475 https://www.newegg.com/silicon-power-128gb-p34a60/p/N82E1682... The hardware required to do this can't be that expensive.
  - dezgeg 3y ago
    > I'm not sure if you can use the hardware designed to act as a host to act as a device, but it wouldn't surprise me. I don't how it is for PCIe, but for example USB is very asymmetric and host controllers generally cannot as devices. There do exist dual-mode IP cores (e.g. for mobile SoCs) > In any case I would find it hard to believe that the hardware that can act as a device would cost significantly more. Indeed the area/cost difference between host-only and dual mode controller may be small. But in a general purpose chip there will be dozens of other competiting features in all the other subsystems besides PCIe. Each of those small features would increase the chip cost, so they won't be added without a cost-benefit calculation. So it can still be that while PCIe device support would be cheap to add, it could still be considered too low bang-for-buck to be worth including. Or that there may be such chips supporting PCIe device mode, but they then also would include things like video encoding/decoding, HDMI, ethernet, etc. and thus be an expensive chip. > The hardware required to do this can't be that expensive. With a custom ASIC (the linked one seems to have Phison E12) that includes only the minimal needed hardware, yes.

snvzz 3y ago

>RISC-V in charge of NAND storage, presenting NVMe (or SATA) interface. Aren't WD SSDs just that?

dezgeg 3y ago
No, they are not just a converter that exposes raw NAND to your PC. Rather they abstract away all the details of how painful raw NAND is to deal with into simple "read/write sectors" interface that all your normal filesystems like ext4, NTFS, etc. deal with. Raw NAND comes with various pain-in-the-ass limitations such as: only erasable in huge (~megabytes) blocks at a time, only writable in slightly-uncomfortably-big chunks (like 32KB or so), and erasing a given region can be done a limited amount of times before it breaks. Oh, and all those details (like exact sizes of erases and writes) will change time to time as manufacturing processes of NAND dies get more advanced.
- AnthonyMouse 3y ago
  That's software, not hardware. And operating systems have long dealt with things like variable sector sizes. You want the abstraction layer. What you don't want is for it to be a black box, and what you shouldn't care about is whether the silicon that runs the code is soldered to the flash chips or not.