3 ms·
If you are keen to try something sooner… https://www.pine64.org/2023/04/10/pinetab-v-and-pinetab2-launch/ https://www.pine64.org/2023/04/10/pinetab-v-and-pinet
by tony-allan 3y ago
If you are keen to try something sooner…
https://www.pine64.org/2023/04/10/pinetab-v-and-pinetab2-launch/ https://www.pine64.org/2023/04/10/pinetab-v-and-pinetab2-lau...
- bodge5000 3y agoAlso this (though its a bit niche I suppose) https://www.clockworkpi.com/product-page/devterm-kit-r01 https://www.clockworkpi.com/product-page/devterm-kit-r01
- brucehoult 3y agoSmall screen and around 8x slower than the PineTab-V, between 1.0 GHz vs 1.5, single-issue vs dual-issue (good for ~1.5x), and one core vs four cores. Plus 1 GB RAM vs 4 or 8 GB. The PineTab-V is at least around the same speed as the Arm-based PineTab2, with the SiFive U74 being very comparable to (even a bit better than) the Arm A55 at the same MHz. In these devices the Arm is at 1.8 GHz vs the RISC-V at 1.5 but that's pretty minor. Also the Arm has NEON SIMD while that generation of RISC-V doesn't have SIMD or Vector -- the D1 and TH1520 do have 128 bit vectors, though standard software doesn't support that, so it's only whatever you write yourself.
- squarefoot 3y agoVery niche indeed. I admit I love the look and would like to have one to tinker with and use for various electronics related projects, but price vs performance is definitely in favor of the PineTab-V. I would however seriously consider buying an edition with no brains, only keyboard plus trackball, LVDS/HDMI/DP/* capable screen, a battery holder and related charging circuitry, then enough internal space to be filled with whatever board the user already has handy, and possibly mounting frames compatible with most known boards (RPi, OrangePi, NanopPi, Odroids, etc). There is already something like that that can use RPi compute modules and similar others, but I'm talking about the full boards, of which almost everyone has a couple unused in a drawer.
- firstlink 3y agoI recommend reading sifive's errata, at least the ones it's possible to get ahold of. They are consistently wild, for multiple CPU IP generations. Some paraphrases that come to mind: "mmu doesn't work; workaround: don't use it" and "exception cause register not sign-extended; workaround: don't cause page faults on addresses in that half of memory".