3 ms·
> Because of the number of registers and 512 bits width, it takes a lot of space in silicon. This makes it costly, and so is reserved for more expensive CPUs.
by Zardoz84 3y ago
> Because of the number of registers and 512 bits width, it takes a lot of space in silicon. This makes it costly, and so is reserved for more expensive CPUs.
> Had it been limited to, or also offered in a 256 bits version, this instruction set would have most likely be included in many more CPUs. Making it much more useful.
Someone it's blatantly ignoring AMD CPUs...
- brrrrrm 3y agoAMD supports the 256 wide subset of the AVX-512 ISA?
- MobiusHorizons 3y agoWhen amd launched AVX-512 support, it was present on all cores of that generation. I think it was zen 3, but I might be misremembering. If I recall correctly it was using 256 bit vectors internally, so full 512 bit operations were slower than intel.
- KolenCh 3y agoIt takes a double pumped approach to use 2 cycle with 256bit wide to finish a AVX 512 instruction. So it sort of does.
- bombela 3y agoI merely summarized the article, don't shoot the messenger :)