RISC just means that the instruction set is reduced (compared to what was the norm in the early 1980s). It does not say whether the architecture is register-mem

RISC just means that the instruction set is reduced (compared to what was the norm in the early 1980s). It does not say whether the architecture is register-memory or load-store (though most RISC ISAs are load-store). As long as the x86 CPUs does not decode to more than, say, two dozen microcode types it uses RISC "internally".