4 ms·
There was a period centered around the late '90s where new architectures were a dime a dozen, as access to fabs opened up, and small companies with an idea hope
by kps 3y ago
There was a period centered around the late '90s where new architectures were a dime a dozen, as access to fabs opened up, and small companies with an idea hoped to become the next Intel.
Anyway, ESP32-C3 is RISC-V, and I suspect they won't do any more new Xtensa cores.
- adolph 3y agoYes, the announcement of the ESP32-P4 certainly makes it look that way. https://www.espressif.com/en/news/ESP32-P4 https://www.espressif.com/en/news/ESP32-P4
- packetlost 3y agoThey've explicitly stated it's all RISC-V from here on out.