> Did you mean to say seq/cst store? Indeed! > set the value to X unconditionally and return me the previous value That would be atomic::exchange that maps t

> Did you mean to say seq/cst store? Indeed! > set the value to X unconditionally and return me the previous value That would be atomic::exchange that maps to XCHG on x86, which, as all atomic RMW is sequentially consistent. Incidentally seq-cst stores are also typically lowered to XCHG on x86 as opposed to the more obvious MFENCE+MOV. There is still room for optimization, as if you can implement your algos with just load/stores and as few strategically placed RMW as you can, it can be a win. Of course if there is any contention, cache coherence traffic is going to dominate over any atomic cost.