3 ms·
As mentioned in another comment, this literally happens during system bringup when you don't have working RAM yet - link training involves a lot of state and yo
by mjg59 3y ago
As mentioned in another comment, this literally happens during system bringup when you don't have working RAM yet - link training involves a lot of state and you can't do it in registers alone, so the cache is configured in such a way that you can use it as RAM (I /think/ this is just a special case of write-back where you never actually do the write?). As long as you're not doing DMA I don't see any reason why you wouldn't be able to bring up a system with empty RAM sockets and just launch Doom out of firmware flash.
- sweetjuly 3y ago> I /think/ this is just a special case of write-back where you never actually do the write? Sort of! A typical implementation (from what I've seen, anyways) is that you have a memory mapped region which, when cache-as-RAM is activated, directly indexes into some cache (typically the LLC). From a hardware perspective, it's a full second address decode mode where you essentially just access the data array without performing tag check/write. When coming in to CAR mode, the cache typically needs to flush, but when leaving it really doesn't need to do anything (assuming it didn't update the tag array and left all lines as invalid). With the size of some modern SoC's LLC, you could fairly easily run DOOM out of CAR. It'll depend on the SoC, but there's no reason why DMA wouldn't work as other agents would still be able to send read and write requests to the CAR memory region.