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~30GHz signalling over the PAM4 "flits" introduced in 6.0. Wild. As for when: > A compliance program for the specification, in turn, should be up and running i
by rektide 3y ago
~30GHz signalling over the PAM4 "flits" introduced in 6.0. Wild. As for when:
> A compliance program for the specification, in turn, should be up and running in 2027. The compliance programs are the functional barometer for hardware availability, as compliance testing and certification is effectively necessary before any large-scale commercial hardware using the new spec can ship. And with few exceptions, these tend to take 2 to 2.5 years to put together. All of which is to say that the first commercial PCIe 7.0 products are not expected until at least 2027 – five years from now – underscoring that there is still a lot of work to go for PCIe 7.0 following this initial draft.
I'd been kind of in a panic that NVlink is up to 900GBps. But 128 lanes of 6.0 is already 1TBps. What's missing, so far, is a way to connect things well with this fabric. No one is talking about it, but hopefully CXL also forms a good host to host fabric too, enabling some unaided/builtin high speed connectivity.