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Keep in mind that when the CISC vs RISC distinction was coined, the predominant architectures were things like IBM System/370 and VAX. System/370 has an instruc
by thequux 3y ago
Keep in mind that when the CISC vs RISC distinction was coined, the predominant architectures were things like IBM System/370 and VAX. System/370 has an instruction that inserts an item into a heap. (and modern Z/Architecture is worse: there are instructions like "compute the HMAC of this data" where the MAC algorithm is in a register.) VAX had an instruction that computed the roots of a polynomial.
The world is very different now. RISC won, and it won hard. x86 got a lot more registers, and most of the baroque instructions are no longer used because they got relegated to microcode. As it's used, it's much closer to Berkeley RISC than it is to VAX or S/370. ARM is even more so: the only instructions that touch memory are loads and stores.
As a rough approximation, "simple" instructions can be implemented in a reasonable amount of silicon without microcode, and complex instructions can't.
- klelatti 3y agoWell all modern architectures have FP and SIMD so it’s not as though complex (microcoded) instructions have been banished.
- atq2119 3y agoSIMD instructions are generally not microcoded though because they are not actually complex. A SIMD addition has pretty much the same microarchitectural complexity as a scalar addition. If you're looking for truly complex instructions, you should look for things like VMENTER or IRET.
- stephencanon 3y agoMost SIMD and FP instructions are not microcoded in a modern mainstream CPU, FWIW.
- klelatti 3y agoInteresting. I sort of expected that for basic FP / SIMD but not for the full range - eg trig functions. Is that wrong?
- stephencanon 3y agoThere really aren't complex math functions in most SIMD ISAs(1), these functions are implemented in software instead. Even for scalar operations, no one(2) uses the x87 trig functions either, as software implementations are both faster and more accurate and have been for a couple decades. (1) various HPC folks have proposed and used extensions that do _part_ of a complex math operation in SIMD at various times, and on GPUs this sort of thing is very common. (2) except for math libraries that haven't been updated for a couple decades.
- deleted 3y ago[deleted]
- rerdavies 3y ago@klelatti As far as I know, nobody has SIMD trig functions at the instruction level. FP trig functions are definitely micro-coded, and are (as-far-as-I-know) found only on CISC processors. (HN seems to have a limit on how deeply you can nest replies. I can't reply to @klelatti's post direct :-/ )
- rerdavies 3y agoThe thing that I find hardest to get used to on ARM is watching compilers generate four or five or six register-based instructions to implement an addressing mode that could have been executed in a single instruction on x86. It really breaks my mental model of how C/C++ translates into machine code.
- sweetjuly 3y agoWith modern compilers, the mental model of what code translates to is long dead. Operations are reordered and statically scheduled, code can be inlined, outlined, eliminated, or duplicated. Vectorization is a whole other can of worms that can appear in often surprising ways. Mix in security extensions like pointer authentication, branch target identification, or even pure software things like stack cookies and now you're getting code you never even wrote inserted everywhere. The best approach is always just to verify the disassembly.
- rerdavies 3y agoI don't really have any problems with mental models for the code I'm going to see on x64 (which does incorporate models of instruction scheduling, multiple issue, elimination (pretty easy), and vectorization, &c). Maybe it will come with more time on ARM; but three years in, it's still not there.