3 ms·
He probably should make BOX64_DYNAREC_RV64NOEXT=1 the default or at least detect it dynamically. Zba and Zbb isn't part of the application profile and other (f
by FullyFunctional 3y ago
He probably should make BOX64_DYNAREC_RV64NOEXT=1 the default or at least detect it dynamically. Zba and Zbb isn't part of the application profile and other (faster) SoC do not necessarily have them (like TH1520).
- ptitSeb 3y agoThe presence of Zba and Zbb extension is tested before using it.
- brucehoult 3y agoTH1520 (and SG2042, D1) have THead custom extension that contains a lot of the same things as Zba and Zbb, just slightly different and with encodings in the custom opcode spaces. e.g. "th.addsl rd, rs1, rs2, imm2" which has an immediate field for the shift instead of separate instructions (which is just documentation really), and shifts rs2 while Zba's sh1add, sh2add, sh3add shift rs1. Also th.ff0, th.ff1, th.rev, th.tstnbz (same as orc.b but with inverted result) They also have pre- and post-increment loads and stores with writeback of the incremented pointer, and [rs1 + rs2 << imm2] loads and stores, which can be useful for JITing x86 (or ARM) addressing modes. https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf https://github.com/T-head-Semi/thead-extension-spec/releases...