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I think he's referring to something similar to what .NET has been doing in the last few versions. They introduced a new Vector API that abstracts platform-speci
by Kipters 3y ago
I think he's referring to something similar to what .NET has been doing in the last few versions. They introduced a new Vector API that abstracts platform-specific SIMD instructions. The end result is the same, code using Vector128 will be directly compiled to equivalent AVX opcodes on x86/x64 and NEON on ARM* as if you would have written that directly, except that now you can add these kinds of optimizations across many architectures with a single codebase
This [0] post by Stephen Toub goes in GREAT detail on that
[0]: https://devblogs.microsoft.com/dotnet/performance_improvements_in_net_7/ https://devblogs.microsoft.com/dotnet/performance_improvemen...
*I may get vector length wrong, but you get the idea
- anonymoushn 3y agoYou can just look up the IntVector API in the docs and see that there's no method corresponding to VCOMPRESSPS or whatever.
- Kipters 3y agoYou mean this IntVector[0], which I assume is the Java experimental API anthony88 was referring to, correct? If that operation being missing is a blocker, I feel there may be some middle ground other than implementing the whole thing in C++ (like adding it or fast tracking work on this API) [0]: https://docs.oracle.com/en/java/javase/19/docs/api/jdk.incubator.vector/jdk/incubator/vector/IntVector.html https://docs.oracle.com/en/java/javase/19/docs/api/jdk.incub...
- gergo_barany 3y agoThe compress operation being missing is not a blocker, since the compress operation is not missing: https://docs.oracle.com/en/java/javase/19/docs/api/jdk.incubator.vector/jdk/incubator/vector/IntVector.html#compress(jdk.incubator.vector.VectorMask) https://docs.oracle.com/en/java/javase/19/docs/api/jdk.incub...
- Kipters 3y agoI don't get the other user's point then
- gergo_barany 3y agoThe user didn't have a point, they just made something up about an API that they know nothing about.
- anonymoushn 3y agoHello, thanks for pointing out that I missed this one. It looks like the methods exposed may be sufficient for implementing a sort. I also looked for vpalignr and vpshufb which seem to be missing, but I'm open to the possibility that I have missed these as well.
- gergo_barany 3y agovpalignr is called "slice", vpshufb is "rearrange". The latter is easy to find if you search the page linked above for "shuf". The former is a bit harder, but I found it by searching for "concat" while thinking about how it might be possible to express it. If you need the vpshufb behavior of zeroing elements where the index is negative, I think you will need to build something out of multiple operations. The compiler is of course free to match those multiple operations to one target instruction, i.e., recognize that what you are trying to say is really a vpshufb. It can do this in the same way that it can match multiple operations like x + y * 8 + 12 to a single lea instruction.
- anonymoushn 3y agoAnother way that rearrange is not vpshufb is that 0 in the 17th position means "get me the first byte (from a different 16-byte lane)" rather than "get me the 17th byte (from this 16-byte lane)" It would be very impressive if the compiler could take a lookup table of values designed to be used as the shuffle argument to rearrange and transform it into a lookup table of values designed to be used as the shuffle argument to vpshufb.