Certainly if you translate x86 machine code to RISC-V code, instruction by instruction with very little context[1], you're going to see a lot of code size expan

Certainly if you translate x86 machine code to RISC-V code, instruction by instruction with very little context[1], you're going to see a lot of code size expansion. The same is not true if you take C or other high level language code and compile it to each ISA using a modern compiler (gcc, clang) with at least -O1. RISC-V rv64gc code is significantly smaller than x86_64 code. It uses a few more instructions, but a lot fewer that you'd naively expect [2], and the smaller average instruction size more than makes up for that. [1] thank goodness they're at least figuring out (most of the time) when the condition codes from x86 instructions are immediately overwritten, so don't need to actually be calculated, as that takes a lot more work than calculating the explicit result of instructions. [2] mostly because of common subexpression elimination, strength reduction, induction variable optimisations, and movement of constant calculations out of loops (the latter doesn't decrease code size but increases speed)