The design of current x86s is that multiple regions under 4GB boundary are occupied by I/O regions, some of them tied to processor (as APIC, HPET, etc.) and som

The design of current x86s is that multiple regions under 4GB boundary are occupied by I/O regions, some of them tied to processor (as APIC, HPET, etc.) and some to extension cards which reject working in 64-bit mode. 3.2GB is an example figure - it could be 3.5GB, 3.6GB... - but reflects that RAM can't be mapped at all of lower 4GB. Memory controllers typically remap part of it to a range upper than 4GB boundary, so 32-bit PAE-capable or 64-bit OS can still use it. OTOH using 64-bit OS is recommended with RAM >=1.5GB because if OS can't map all RAM _twice_ and all device memory to virtual address space, tricks with memory banking (frequent page remapping) are getting needed to deal with data move.