3 ms·
How can you produce such a wall of text over a little misnomer? You obviously understood that I am referring to the current incarnation of the ARMv7 ISA, a.k.a
by hackermom 15y ago
How can you produce such a wall of text over a little misnomer? You obviously understood that I am referring to the current incarnation of the ARMv7 ISA, a.k.a the Cortex family.
- Symmetry 15y agoMostly I put up a wall of text because I think the subject is interesting and I wanted to talk about it, but really there is no one IPC for the Cortex Family. An A5 will tend to have an IPC that is much lower than an Atom. An A15 will tend to have an IPC that is much higher than an Atom. And for the cores being compared here, on tight microbenchmarks the superior execution resources[1] and OoO execution of an A9 will put it ahead of an Atom, but on pointer chasing code the superior branch predictor of the Atom will probably give it a higher IPC. EDIT: [1] Well, really the 16 vs 8 registers, 3 operand instructions, and free barrel shift in each instruction. I think they have the same number of ALUs and AGUs.