Very interesting article. If its assertions and conclusions are correct then it's very useful information. I've been somewhat suspicious of CISC processors wi

Very interesting article. If its assertions and conclusions are correct then it's very useful information. I've been somewhat suspicious of CISC processors with large microcode real estate ever since the days of the Pentium bug, which was, if I recall correctly, when microcode began to quickly increase in complexity. (I'm not a processor designer but it seems to me that with increased size and complexity bugs would be more likely.) Alternatively, RISC seemed too limited, but then I'm viewing this from a programming perspective—not that of processor design. Probably the most interesting aspect of the article was Jim Keller's point about the 'cleanness' of the newer RISC-V architecture, as that may settle the ongoing comparisons and arguments over it and ARM. For people like me who want to see more independent and open hardware architecture available, it'll be interesting to see how that plays out over time.