I have wondered something for a while. x86 (32 and 64 bit) have much smaller instruction size on average than RISC ISAs. Given that modern compute performance i

I have wondered something for a while. x86 (32 and 64 bit) have much smaller instruction size on average than RISC ISAs. Given that modern compute performance is heavily affected by cache performance and memory latency, it seems like the smaller codesize could really help with caching performance. Is this actually a factor? Does arm need bigger caches to combat this? Or does the unpredictability of unguessable instruction offsets ruin this in some way? It's obviously only one factor among menay, and ram is often filled with data not just code, but I've wondered about it for a while.