3 ms·
I've been sitting here in my spare time writing / yak shaving an adaptive radix tree implementation I wrote... to try to keep various things in L1 cache and, w
by cmrdporcupine 4y ago
I've been sitting here in my spare time writing / yak shaving an adaptive radix tree implementation I wrote... to try to keep various things in L1 cache and, well, y'know, it'd be nice in a way to just sometimes... have this all be explicit and not automatic? To be able to put the machine into a mode where I could have the various levels of memory declared by the hardware have separate manual methods for accessing each, e.g. to be able to load L1 myself, etc. The CPU & board could tell me the size and cost of each level, and I could write a software model to move things around myself. Fantasy.
- convolvatron 4y agoThere is a whole class of communication optimal algorithms. And cache oblivious ones. You really shouldn’t have to do what you’re doing, and progress is being made.