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> And with the Pentium & the ISAs that followed they just seemed to pull a rabbit from a hat. They made the x86 CISC architecture scale in a way that pundits at
by temac 3y ago
> And with the Pentium & the ISAs that followed they just seemed to pull a rabbit from a hat. They made the x86 CISC architecture scale in a way that pundits at least? didn't seem to think was possible.
The Pentium was not great, not terrible. IIRC 2 ways superscalar in-order, quite faster than the 486 (also because of caches, better memory, faster and wider FSB, way better latencies for tons of instructions) but it would not have been enough if Intel had tried to just make it evolve slowly.
Of course at the time and taking price and competition into account, it was quite good to make faster PCs. But by itself it only showed a limited capability for scaling x86.
The Pentium Pro was the uarch that showed that scaling was possible. Even if they have been deeply refined across the years and generations (putting NetBurst appart, of course), most of the technics it introduced in the x86 world are still a foundation of how the current generation x86 cores work. The rabbit that came out of the hat was the result of quite a number of years of work, most of it parallel to the P5 dev. The Pentium II consolidated that with better support for consumer software of the time (with still copious amount of 16-bit code), and, logically, marketing for consumer hardware (with manufacturing progress and tricks allowing a price not too high).
- labcomputer 3y ago> The Pentium was not great, not terrible. IIRC 2 ways superscalar in-order, Eh, I don't agree. Look at the other superscalar microprocessors available around the same time: * POWER (1990) * Alpha 21064 (1992) * PA-RISC 7100 (1992) * Pentium (1993) * POWER2 (1993) * MIPS R8000 (1994) * PA-RISC 7200 (1995) * UltraSparc (1995) * Alpha 21164 (1995) So, first of all, all of these are in-order processors. Out of order execution didn't come until later ('95 for PA-8000, '96 for R10k and Pentium Pro and '98 for Alpha 21264 and Power3). Second, all of the RISC superscalar processors prior to the Pentium are also (technically) dual issue. But Pentium did something unique: It can issue two integer instructions in the same cycle. Before that, all the others could issue only one instruction of a given type (load/store, int, and fp) per cycle. In other words, while they may be "dual issue", your instruction stream needs a mix of those types to get any benefit from multi-issue on those early implementations. In terms of having 2x execution units of the same type: POWER2 got there later in 1993, but was not a single-chip processor, followed by R8000 (also multi-chip), PA-7200 and 21164. That's why Pentium had pretty good integer benchmarks, even while it was getting crushed on floating point compared to RISC.