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I don't think that is true. Last I checked apple M1 max chips have up to 800GB/s throughput, whilst AMDs high end chips taper out at around ~250GB/s or so, clo

by ricw 3y ago

I don't think that is true. Last I checked apple M1 max chips have up to 800GB/s throughput, whilst AMDs high end chips taper out at around ~250GB/s or so, closer to what a standard M2 chip does (not max, or pro version). at the top end they've got at least 2x the memory bandwidth than other CPU vendors, and that's likely the case further down too.

wmf 3y ago
The Mx Max should be compared to a discrete CPU+GPU combination that does have comparable total memory bandwidth. It isn't automatically better to put everything on one chip.
jsheard 3y ago
It's worth noting that Apples stated bandwidth numbers aren't really attainable in CPU-only workloads, so for the sake of comparison to discrete CPUs they're not that useful. The M1 Max is advertised as having 400GB/sec bandwidth but the CPU cores can only use about half of that - still impressive, but not as impressive as you might think from the marketing. (The M1 Ultra is the one with 800GB/sec bandwidth on paper)
- inkyoto 3y ago
  Anandtech has measured the 104 Gb/sec per a CPU core for the M1 Max and 210 Gb/sec circa per a CPU cluster bandwidths. M1 Max has 3x CPU clusters: 1x power effecient (2x cores) and 2x performance ones (4x cores each). Where it gets interesting is how access to the memory is multiplexed in the most extreme case where 3x CPU clusters, 32x GPU and 16x ANE cores are attempting to fetch memory blocks at different locations and at once. It is not unreasonable to presuppose that Apple Silicon contraptions use the switched memory architecture, however with such a high degree of parallelism it is very intriguing to know how the memory architecture has been actually designed and optimised. High performant memory access has always been a big deal that usually comes with big money attached to it via a, naturally, non-memory bus associated connection.

by ricw 3y ago

wmf 3y ago

The Mx Max should be compared to a discrete CPU+GPU combination that does have comparable total memory bandwidth. It isn't automatically better to put everything on one chip.

jsheard 3y ago

It's worth noting that Apples stated bandwidth numbers aren't really attainable in CPU-only workloads, so for the sake of comparison to discrete CPUs they're not that useful. The M1 Max is advertised as having 400GB/sec bandwidth but the CPU cores can only use about half of that - still impressive, but not as impressive as you might think from the marketing. (The M1 Ultra is the one with 800GB/sec bandwidth on paper)

inkyoto 3y ago
Anandtech has measured the 104 Gb/sec per a CPU core for the M1 Max and 210 Gb/sec circa per a CPU cluster bandwidths. M1 Max has 3x CPU clusters: 1x power effecient (2x cores) and 2x performance ones (4x cores each). Where it gets interesting is how access to the memory is multiplexed in the most extreme case where 3x CPU clusters, 32x GPU and 16x ANE cores are attempting to fetch memory blocks at different locations and at once. It is not unreasonable to presuppose that Apple Silicon contraptions use the switched memory architecture, however with such a high degree of parallelism it is very intriguing to know how the memory architecture has been actually designed and optimised. High performant memory access has always been a big deal that usually comes with big money attached to it via a, naturally, non-memory bus associated connection.