4 ms·
If that was an ask for a specific example, one of the most common uses for FPGAs is DSPs. Say you have a simple FIR filter of, say, 63 taps. To do this in a CPU
by awjlogan 3y ago
If that was an ask for a specific example, one of the most common uses for FPGAs is DSPs. Say you have a simple FIR filter of, say, 63 taps. To do this in a CPU requires you to load two values and do a multiply/accumulate for each tap in sequence. Very (!!) optimistically, that’s about 192 instructions. With an FPGA, you can do all the multiplications in parallel and then just sum the outputs - probably done in 2 cycles and with pipelining your throughput could be a sample every clock.
If the FPGA is too slow, too power inefficient etc you can (if you have the money!) take the same core design and put it in an ASIC. The FPGA provides an excellent prototyping environment; in this example you can tune the filter parameters before committing to a full ASIC.
- pjc50 3y ago> multiply/accumulate for each tap in sequence. Very (!!) optimistically, that’s about 128 instructions This is what all those vector instructions are for. FPGA is kind of invaluable if you have lots of streams coming in at high megabit rates, though, and need to preprocess down to a rate the CPU and memory bus can handle.
- awjlogan 3y agoYes, indeed :) Didn’t want to muddy the waters with vector instructions, and it’s fair to say that the dedicated DSP chip market has been squeezed by FPGAs on one side and vectorised (even lightly, like the Cortex-M4/M7 DSP extension) CPUs on the other.
- asdfman123 3y agoExplain it to me like I’m your mom.
- rcxdude 3y agoYou can do the multiplications in parallel but summing 63 values in one clock is not going to work that well. You would almost certainly want more pipelining, though with an FIR you can do this without increasing latency.