You can’t preserve ordering mapping permutations of a high-dimensional space (specs: clock rate, power, cores, cache, pipelining/vectorization, etc) with anothe

You can’t preserve ordering mapping permutations of a high-dimensional space (specs: clock rate, power, cores, cache, pipelining/vectorization, etc) with another high dimensional space (benchmarks, workloads, and scenarios) to a single number. It’s possible even for a chip with superior numerical specs across the board from another chip to perform worse due to lack of support for specialized instructions or differences in thermals.