2 ms·
How do you mean? Measured in cycles embedded devices typically have less latency to SRAM.
by tjoff 4y ago
How do you mean? Measured in cycles embedded devices typically have less latency to SRAM.
- xxs 4y agoYou're right, I guess. On devices where the memory (sram) tends not to have its own clock (and there is no OOO), it can effectively be one cpu cycle. PIC and ESP-32 comes to mind. If there is 'extra' not on chip memory, it'd be way worse, of course.