3 ms·

Seymour Cray needs more credit here. The 1964 CDC6600 (fastest supercomputer of the 1960s) would be classified as RISC if made today, as would the Cray 1 (ditt

Seymour Cray needs more credit here. The 1964 CDC6600 (fastest supercomputer of the 1960s) would be classified as RISC if made today, as would the Cray 1 (ditto 70s). Both have a lot of similarities to modern RISC-V, including the use of two instruction lengths (15 and 30 bits on CDC6600, 16 and 32 bits on Cray 1), which both the IBM 801 and RISC-II also did. The Cray 1's Vector instruction set is also very similar to RISC-V's V extension. The biggest difference is on the Cray 1 the programmer has to know the vector registers are 64 elements long and set the correct length (1-64 elements) using the "0020xk Transmit (Ak) to VL" instruction on each iteration of the strip-mining loop. On RISC-V you tell "vsetvl" how many elements remain in your vector and the instruction returns as its result how many elements it can process, so RISC-V CPUs can have wildly different vector register lengths but run the same code.

klelatti 4y ago
RISC-I didn't have two instruction lengths. All instructions were 32-bit long. Otherwise, yes RISC-I is very similar to RISC-V. Source, David Patterson: https://aspire.eecs.berkeley.edu/2017/06/how-close-is-risc-v-to-risc-i/ https://aspire.eecs.berkeley.edu/2017/06/how-close-is-risc-v...
- brucehoult 4y ago
  Dammit, sorry .. that was RISC-II. "The other major change was to include an instruction-format expander, which invisibly "up-converted" 16-bit instructions into a 32-bit format. This allowed smaller instructions, typically things with one or no operands, like NOP, to be stored in memory in a smaller 16-bit format, and for two such instructions to be packed into a single machine word. The instructions would be invisibly expanded back to 32-bit versions before they reached the arithmetic logic unit (ALU), meaning that no changes were needed in the core logic. This simple technique yielded a surprising 30% improvement in code density, making an otherwise identical program on Blue run faster than on Gold due to the decreased number of memory accesses." https://en.wikipedia.org/wiki/Berkeley_RISC#RISC_II https://en.wikipedia.org/wiki/Berkeley_RISC#RISC_II

klelatti 4y ago

RISC-I didn't have two instruction lengths. All instructions were 32-bit long. Otherwise, yes RISC-I is very similar to RISC-V. Source, David Patterson: https://aspire.eecs.berkeley.edu/2017/06/how-close-is-risc-v-to-risc-i/ https://aspire.eecs.berkeley.edu/2017/06/how-close-is-risc-v...

brucehoult 4y ago
Dammit, sorry .. that was RISC-II. "The other major change was to include an instruction-format expander, which invisibly "up-converted" 16-bit instructions into a 32-bit format. This allowed smaller instructions, typically things with one or no operands, like NOP, to be stored in memory in a smaller 16-bit format, and for two such instructions to be packed into a single machine word. The instructions would be invisibly expanded back to 32-bit versions before they reached the arithmetic logic unit (ALU), meaning that no changes were needed in the core logic. This simple technique yielded a surprising 30% improvement in code density, making an otherwise identical program on Blue run faster than on Gold due to the decreased number of memory accesses." https://en.wikipedia.org/wiki/Berkeley_RISC#RISC_II https://en.wikipedia.org/wiki/Berkeley_RISC#RISC_II