4 ms·

> NVIDIA and Apple will tell TSMC what logic gates go where (or often at an even higher level—specifying certain SRAM blocks going here or there). That's not q

by kayson 3y ago

> NVIDIA and Apple will tell TSMC what logic gates go where (or often at an even higher level—specifying certain SRAM blocks going here or there). That's not quite how design works; it's much much more detailed. At the end of the day, TSMC's customers send them a "GDS" file that is a complete physical representation of the die they want manufactured. It describes every top-to-bottom later of the manufacturing process. (TSMC will take the GDS layers and split them up or combine them or do other operations, depending on some process details, but the customer will also check and sign off on that). It's not just telling TSMC where to put standard cells or SRAM. And while TSMC does offer their own standard cells and SRAM, customers can and often do design and use their own. Analog/RF design is even more detailed, since that's done at an individual transistor level. TSMC is mainly in the business of design and selling a manufacturing process for making transistors not logic gates.

efishnc 3y ago
So in that case there is no materials secret sauce guarded by TSMC, with the customer either submitting the GDS file with all the info, or signing off on the modified version.
- kayson 3y ago
  Sorry my comment wasn't very clear about this. There's still secret sauce in the materials. The GDS is purely dimensional. It's just a bunch of shapes. But how those shapes get translated into actual silicon, and how various chemicals are used and in what concentrations to manipulate the silicon to make the transistors function is the secret sauce.
rayiner 3y ago
I was under the impression that it’s unusual for fabless chipmakers to do transistor level design anymore, and that they mostly rely on the standard TSMC libraries. But I may be wrong about that. The critical point I was trying to make is that the ASML machine doesn’t know how to make transistors. That’s something TSMC does: https://www.anandtech.com/show/16041/where-are-my-gaafets-tsmc-to-stay-with-finfet-for-3nm https://www.anandtech.com/show/16041/where-are-my-gaafets-ts...
- kayson 3y ago
  No that's definitely not the case. For digital design, in general, you're not doing anything transistor-level. But those digital designers are using standard cell or memory libraries which are created at a transistor level. I believe the foundries also charge for their own standard cell libraries, and there are many other vendors that a design company can choose from like cadence, synopsys, even ARM. For analog/RF design, of which there is still an enormous amount, it's always transistor level.
  - rayiner 3y ago
    Since you seem to know a lot about this--could Apple (or Cadence or ARM) create custom transistors on TSMC's process?
    - kayson 3y ago
      Theoretically, yes, but in practice, no. Creating a manufacturing process is a very complex and time consuming process that takes a huge about of research and development, investment, etc to achieve profitable yields. For bulk CMOS processes, which is what digital circuits are made on, this is especially the case. Foundries like TSMC can't afford to let customers design custom transistors, and customers generally don't have the expertise to do so. There's a huge economies of scale benefit from having customers all use the same process. That being said, there is a little room for tweaking. The manufacturing process has a ton of variation in it, and the center point / average of that variation can be moved around a little. I think most companies just take what they get, but I'm betting the big players (Qualcomm, Apple, Nvidia, AMD) all do internal tracking of the process variation when they get product back, and give feedback to the foundries to make changes to optimize their own yield. There's also been a recent push in the very new and advanced processes for "Design-Technology Co-Optimization", where the digital circuit design (i.e. standard cells and memory) and the process technology design happens together. We got here because all of the low hanging fruit has been picked and now companies are chasing single digit percentages in yield and PPA (power, performance, and area) improvements. It's a collaboration between foundry and customer that happens before the process is even released, so again - big players only, and it's still more tweaking than custom transistors. For other types of processes, meaning non-bulk CMOS, customers can definitely design their own transistors. This is especially common in RF applications where you're often making chips with a few transistors. In some cases, it can be just changes in the shapes and/or dimensions of the transistors in the GDS, relative to what the foundry recommends. For this type of custom transistor, the foundry still controls the material science details of how the process happens. In other cases, though, customers are in control of everything from the transistor dimensions to the chemical concentrations and methods used for fabrication.

by kayson 3y ago

efishnc 3y ago

So in that case there is no materials secret sauce guarded by TSMC, with the customer either submitting the GDS file with all the info, or signing off on the modified version.

kayson 3y ago
Sorry my comment wasn't very clear about this. There's still secret sauce in the materials. The GDS is purely dimensional. It's just a bunch of shapes. But how those shapes get translated into actual silicon, and how various chemicals are used and in what concentrations to manipulate the silicon to make the transistors function is the secret sauce.

rayiner 3y ago

I was under the impression that it’s unusual for fabless chipmakers to do transistor level design anymore, and that they mostly rely on the standard TSMC libraries. But I may be wrong about that. The critical point I was trying to make is that the ASML machine doesn’t know how to make transistors. That’s something TSMC does: https://www.anandtech.com/show/16041/where-are-my-gaafets-tsmc-to-stay-with-finfet-for-3nm https://www.anandtech.com/show/16041/where-are-my-gaafets-ts...

kayson 3y ago
No that's definitely not the case. For digital design, in general, you're not doing anything transistor-level. But those digital designers are using standard cell or memory libraries which are created at a transistor level. I believe the foundries also charge for their own standard cell libraries, and there are many other vendors that a design company can choose from like cadence, synopsys, even ARM. For analog/RF design, of which there is still an enormous amount, it's always transistor level.
- rayiner 3y ago
  Since you seem to know a lot about this--could Apple (or Cadence or ARM) create custom transistors on TSMC's process?
  - kayson 3y ago
    Theoretically, yes, but in practice, no. Creating a manufacturing process is a very complex and time consuming process that takes a huge about of research and development, investment, etc to achieve profitable yields. For bulk CMOS processes, which is what digital circuits are made on, this is especially the case. Foundries like TSMC can't afford to let customers design custom transistors, and customers generally don't have the expertise to do so. There's a huge economies of scale benefit from having customers all use the same process. That being said, there is a little room for tweaking. The manufacturing process has a ton of variation in it, and the center point / average of that variation can be moved around a little. I think most companies just take what they get, but I'm betting the big players (Qualcomm, Apple, Nvidia, AMD) all do internal tracking of the process variation when they get product back, and give feedback to the foundries to make changes to optimize their own yield. There's also been a recent push in the very new and advanced processes for "Design-Technology Co-Optimization", where the digital circuit design (i.e. standard cells and memory) and the process technology design happens together. We got here because all of the low hanging fruit has been picked and now companies are chasing single digit percentages in yield and PPA (power, performance, and area) improvements. It's a collaboration between foundry and customer that happens before the process is even released, so again - big players only, and it's still more tweaking than custom transistors. For other types of processes, meaning non-bulk CMOS, customers can definitely design their own transistors. This is especially common in RF applications where you're often making chips with a few transistors. In some cases, it can be just changes in the shapes and/or dimensions of the transistors in the GDS, relative to what the foundry recommends. For this type of custom transistor, the foundry still controls the material science details of how the process happens. In other cases, though, customers are in control of everything from the transistor dimensions to the chemical concentrations and methods used for fabrication.