4 ms·
Not really. If you're going for performance, you're going to be using NUMA aware code, and your compute is going to stay on a single CCD (if you set up your NUM
by sudosysgen 4y ago
Not really. If you're going for performance, you're going to be using NUMA aware code, and your compute is going to stay on a single CCD (if you set up your NUMA domain correctly). Then it's up to you to decide if you benefit more from cache or frequency.
EDIT: AMD CPUs with nonuniform cache (such as this one), with the right motherboard, support L3 as NUMA, which means that each CCX is exposed as a NUMA domain.
- dragontamer 4y agoI don't think the 7950x is NUMA? But I don't have such a system, nor have I played with the BIOS settings of that chip. But it only has one memory controller, so I doubt there's a NUMA setting. Correct me if I'm wrong of course.
- wmf 4y agoEpyc has a NUMA node per CCX mode but I don't know if Ryzen "BIOS" includes any NUMA support. That also doesn't help if you're running a uniform workload.
- sudosysgen 4y agoThere are consumer motherboards which do expose this setting, so I would expect it to also be available here. There are very few workloads where you will have less per-core performance on a 7950X3D than, say, an EPYC CPU. Even those relatively lower clocks are pretty high by server standards.
- rektide 4y agoThe memory access is through the same IOD (so memory access to main memory is fairly uniform) but there are two different CCD's, two different NUMA zones. Communication between them is slower than communication within the CHIP. And one chip has vastly more L3 cache than the other.
- wmf 4y agoTechnically it's NUCA so treating CCXes as NUMA nodes is kind of misusing the concept. Cluster-aware scheduling might be a better way to handle it: https://www.phoronix.com/news/AMD-Linux-L2-Cluster-Scheduler https://www.phoronix.com/news/AMD-Linux-L2-Cluster-Scheduler
- sudosysgen 4y agoThe L3 caches also aren't shared between CCDs/CCXes which is an important distinction.