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Your intel example doesn't fully hold water. Chip design has taken a binning approach for decades at this point. The silicon is designed for failure in such a w
by deelowe 4y ago
Your intel example doesn't fully hold water. Chip design has taken a binning approach for decades at this point. The silicon is designed for failure in such a way that yield is maximized assuming there will be a variance in quality. Launch and iterate happens for silicon just like anything else. During the initial product launch, there is a lot of waste, but as processes are improved, microcode updated, rework procedures defined, and value engineering efforts completed, yields go up and costs go down.
- sandworm101 4y agoIt depends on what you count as a chip. Modern "chips" are actually a great many things all one one slab of silicon. Failure then knock out single components, resulting in the final chip going into one bin or another. And each of those components can be as complex as an entire "chip" from a few years ago. That is really creating reliability through numbers. Within every component any slight error will still brick that component. The binning process is really a edge case where the fab is playing at the margins. Any slight increase in error rate would quickly see every chip going into a "bad" bin, with the entire processing becoming uneconomical. Intel, and everyone else building chips, strives for perfection with a zero tolerance mantra.
- Taniwha 4y agoBut binning is largely binning against performance curves: "we doped this side of the wafer just a little too much and it's a little slow, but this one from the other side is just right" - while checking for faults (full chip scan and other manufacturing tests) result in dies being thrown out.