That's hilarious. Using a whole CPU for prefetching data because of poor shared bus performance for both the CPUs and GPUs (?!). Instead of such crazy "software

That's hilarious. Using a whole CPU for prefetching data because of poor shared bus performance for both the CPUs and GPUs (?!). Instead of such crazy "software solution", I would rather prefer to use a portion of its L2 or L3 cache size (e.g. 1MB for a 3MB L2/L3 cache) for the GPU itself, and reduce the bus saturation with DMA transfers (e.g. just like the SPE units of the Cell CPU work).