3 ms·

>Honestly, the datasheets are usually just wrong. The writer is an intern and the material is cargo-cult copy-pasted. If it works it's by accident, or because i

>Honestly, the datasheets are usually just wrong. The writer is an intern and the material is cargo-cult copy-pasted. If it works it's by accident, or because it wasn't critical in the first place. Read the datasheet, understand what it's trying to do, then go ahead and achieve that end in the most sensible manner. I haven't stumbled across outright wrong just yet, but I have seen plenty of "wildly inconsistent" between layers of app notes and data sheets, especially on little RF chips. My advice to my team has been to choose the approach with the most places for caps and we'll fix it if we have to. Extra points to place caps don't hurt except when they do, and we haven't had to fiddle so far - we probably fall into "not that critical", because I'm not that lucky. > Instead follow EMC wizard Henry Ott's advice OK, we are on the same page. I still get schooled now and then, and Ott's treatment of this subject (pp. 444 - 447) got a post-it this decade sometime. > It's still wrong and dumb to do this with MLCCs unless you have simulated the hell out of the whole thing. What do you do for simulation? I haven't. I would throw a linear simulator at the problem but maybe that's just the hammer I have.

exmadscientist 4y ago
Yeah RF is quite a bit different from the usual analog or low-speed digital stuff. I don't have any great suggestions on PDN simulators... one of the reasons I design with the big-V method is to avoid having to simulate this stuff. At the volumes most of my work ships at, trading a few extra MLCCs per board for a large savings in design time is a great tradeoff. As for datasheets, they're rarely outright wrong. More... detached from reality. For example, a lot of SMPS datasheets will suggest some strange stuff. When you realize the actual rule of "place a low-ESL=physically small part right next to the regulator then the rest of the capacitors nearby", the weirdo advice starts to make sense, and you can tell what you really ought to do. That's why it's really important to separate the intent of the datasheet from the suggested implementation. The intent is usually worth paying attention to... the random use of 0.1uF capacitors, not so much.

exmadscientist 4y ago

Yeah RF is quite a bit different from the usual analog or low-speed digital stuff. I don't have any great suggestions on PDN simulators... one of the reasons I design with the big-V method is to avoid having to simulate this stuff. At the volumes most of my work ships at, trading a few extra MLCCs per board for a large savings in design time is a great tradeoff. As for datasheets, they're rarely outright wrong. More... detached from reality. For example, a lot of SMPS datasheets will suggest some strange stuff. When you realize the actual rule of "place a low-ESL=physically small part right next to the regulator then the rest of the capacitors nearby", the weirdo advice starts to make sense, and you can tell what you really ought to do. That's why it's really important to separate the intent of the datasheet from the suggested implementation. The intent is usually worth paying attention to... the random use of 0.1uF capacitors, not so much.