For most of the embedded designs today the power planes are the bulk of low-ESR/ESL decoupling (even on 4 layer boards with powerplanes in the middle layers), i

For most of the embedded designs today the power planes are the bulk of low-ESR/ESL decoupling (even on 4 layer boards with powerplanes in the middle layers), it is a cap of ridiculously small capacity, but with essentially zero ESL/ESR.