For me the most interesting thing about ZPU is that its instructions are only a single byte each, which means that while the CPU is much smaller than most RISC-

For me the most interesting thing about ZPU is that its instructions are only a single byte each, which means that while the CPU is much smaller than most RISC-V implementations, the code density is significantly better than RV32 code. (Compressed RISC-V code can beat ZPU, but adding the compressed instruction set to a RISC-V core increases its size quite a bit.) I did play with the ZPU quite a bit 8 or 9 years ago, and forked the ZPU Small variant to create ZPUFlex [0]. I borrowed a number of ideas from ZPU when I created my own CPU Project, EightThirtyTwo [1], some years later. [0] https://github.com/robinsonb5/ZPUFlex https://github.com/robinsonb5/ZPUFlex [1] https://github.com/robinsonb5/EightThirtyTwo https://github.com/robinsonb5/EightThirtyTwo