4 ms·

> 18A will be half a node denser than N2, while also being 12 months earlier to market. It would be interesting to hear what the consensus view is on Intel act

> 18A will be half a node denser than N2, while also being 12 months earlier to market. It would be interesting to hear what the consensus view is on Intel actually being able to meet this timetable. Surely a strong degree of scepticism is warranted given their recent record.

chasil 4y ago
A recent interview with Shang-Yi Chiang, former Vice President of R&D at TSMC (also held positions at TI, HP, and SMIC) had insightful commentary on the speed of bringing up a new node. "We all take two years to develop one generation, how come you guys can do it in one or one-and-a-half year?" And they asked if some of your customer transfer technology to you or what not? And I told him, "No," I told him that, "That's not true." I think he probably implied we steal technology from customer, the way he talk. And I say, "I'll tell you why." I said that, "When we develop one node, basically you have some learning cycles. First, you do some simulation. And you have some idea, then you run wafers to prove that. So, you run a group of wafers according to simulation and you have some splits. The wafer runs through the fab, they come out and you measure them, you analyze them, and you try to improve and you run this again. This again, you run. So, this is learning cycle." At that time, "It takes about six learning cycle, roughly, to complete one generation." Of course, you had some short loops and not just one. I said that, "My R&D wafer in the fab run much faster than yours, because my R&D engineer works three shifts and you only work one shift. So, your R&D wafer move eight hours a day, my work/move 24-hours a day. So, my wafers go three times faster, even if you are twice smarter than me, I still beat you up." <laughter> https://www.computerhistory.org/collections/catalog/102792671 https://www.computerhistory.org/collections/catalog/10279267...
smolder 4y ago
Some skepticism, but not too much. There's a decent possibility the self-sabotage at Intel stopped after new CEO Pat Gelsinger took over. Previous leadership was seriously mismanaging things. The following comment sheds some light on their stagnation during the 10nm/'Intel 7' node development period: https://news.ycombinator.com/item?id=31759034 https://news.ycombinator.com/item?id=31759034

chasil 4y ago

A recent interview with Shang-Yi Chiang, former Vice President of R&D at TSMC (also held positions at TI, HP, and SMIC) had insightful commentary on the speed of bringing up a new node. "We all take two years to develop one generation, how come you guys can do it in one or one-and-a-half year?" And they asked if some of your customer transfer technology to you or what not? And I told him, "No," I told him that, "That's not true." I think he probably implied we steal technology from customer, the way he talk. And I say, "I'll tell you why." I said that, "When we develop one node, basically you have some learning cycles. First, you do some simulation. And you have some idea, then you run wafers to prove that. So, you run a group of wafers according to simulation and you have some splits. The wafer runs through the fab, they come out and you measure them, you analyze them, and you try to improve and you run this again. This again, you run. So, this is learning cycle." At that time, "It takes about six learning cycle, roughly, to complete one generation." Of course, you had some short loops and not just one. I said that, "My R&D wafer in the fab run much faster than yours, because my R&D engineer works three shifts and you only work one shift. So, your R&D wafer move eight hours a day, my work/move 24-hours a day. So, my wafers go three times faster, even if you are twice smarter than me, I still beat you up." <laughter> https://www.computerhistory.org/collections/catalog/102792671 https://www.computerhistory.org/collections/catalog/10279267...

smolder 4y ago

Some skepticism, but not too much. There's a decent possibility the self-sabotage at Intel stopped after new CEO Pat Gelsinger took over. Previous leadership was seriously mismanaging things. The following comment sheds some light on their stagnation during the 10nm/'Intel 7' node development period: https://news.ycombinator.com/item?id=31759034 https://news.ycombinator.com/item?id=31759034