Open Chiplet Ecosystem Open-Source EDA Toolchain (24h dev cycle) RISC-V: open-source / licensed / classified Upcoming FPGAs made-in-USA by TSMC Arizona

Open Chiplet Ecosystem Open-Source EDA Toolchain (24h dev cycle) RISC-V: open-source / licensed / classified Upcoming FPGAs made-in-USA by TSMC Arizona Domain-specific accelerators This interoperability vision aims to improve US chip supply chain resilience, integrity, reshoring and reusability of IP blocks in the wake of Moore's Law. > For chiplet adoption, the industry needs to worry not just about the die-to-die interfaces and packaging technology but the whole chiplet economy. For example, how to describe a chiplet before building it in order to achieve efficient modularity .. Some of the other areas to get addressed include: How to address known-good-die (KGD) in business contracts. How to accomplish architecture exploration? How to handle business logistics? Until now, proprietary packaging has limited the "chiplet economy". The current iteration of standards initiatives started around 2018. https://www.opencompute.org/blog/the-ocp-open-domain-specific-architecture-odsa-subproject-makes-significant-gains-in-chiplet-based-architecture-design-and-industry-collaboration https://www.opencompute.org/blog/the-ocp-open-domain-specifi... > Decades of progress with general-purpose CPUs have slowed, while performance requirements of workloads have catapulted, driving significant demand in domain-specific accelerators ... The ODSA subproject’s mission is to define an open interface and architecture that enables the mixing and matching of silicon chiplets from different vendors via an open marketplace onto a single SoC. Linux Foundation, https://www.chipsalliance.org/ https://www.chipsalliance.org/ > CHIPS Alliance develops high-quality, open source hardware designs relevant to silicon devices and FPGAs ... Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks. In parallel, there is funded university research to create a reliable open-source EDA toolchain, https://woset-workshop.github.io/WOSET2022.html https://woset-workshop.github.io/WOSET2022.html > Chisel and Verilator provide an open-source stack for digital design. For ASIC synthesis, we have open-source tools like OpenROAD, Yosys, and Magic. OpenROAD is a project to deliver an end-to-end silicon compiler in open source. The aim is to “democratize hardware design” by providing an automated layout generation flow from a design in RTL to GDS files used to produce silicon. Google and Efabless offer free production of chips in a multi-project wafer if the project is available in open source. David Patterson & John Hennessy's 2018 Turing Award lecture explained why "democratizing hardware design" is needed to reduce cost/time for domain-specific computing, https://news.ycombinator.com/item?id=18118957 https://news.ycombinator.com/item?id=18118957 Videos from 2021 DARPA ERI (Electronics Resurgence Initiative) conference: https://youtube.com/playlist?list=PL6wMum5UsYvaKtr1GOr-rqhD_fZa46CX1 https://youtube.com/playlist?list=PL6wMum5UsYvaKtr1GOr-rqhD_... & https://eri-summit.darpa.mil/2021-Agenda https://eri-summit.darpa.mil/2021-Agenda