4 ms·
> SI → IND R DS,BL 1: Read byte/word from SI > IND → SI JMPS X0 8 test instruction bit 3: jump if LODS > DI → IND W DA,BL MOVS path: writ
by anyfoo 4y ago
> SI → IND R DS,BL 1: Read byte/word from SI
> IND → SI JMPS X0 8 test instruction bit 3: jump if LODS
> DI → IND W DA,BL MOVS path: write to DI
Is "W DA,BL" a typo, should it be "W DS,BL"?
- rep_lodsb 4y agoDA = "Data segment Alternate", or something like that. It refers to the segment register normally called ES, which string instruction implicitly use as destination (source being DS unless overridden). The names are those used in a patent filed by Intel and come from before the official documentation for the 8086 was written. It might make the microcode a bit more readable to invent a different notation that is more in line with normal x86 assembly, but then again this is a very niche topic :)
- anyfoo 4y agoAh, I forgot that it's DS:SI to ES:DI. Thanks.
- kens 4y agoNot a typo, but something I should clean up. The move instruction moves from DS:SI to ES:DI. The 8086 registers originally had different names (which is why AX, BX, CX, DX aren't in order) and the "Extra Segment" was the "Alternate Segment". So the 8086 patent uses "DA" to indicate what is now ES. ("A" for Alternate but I'm not sure why "D" is used for all the segments.) The register names were cleaned up before the 8086 was released. Andrew Jenner's microcode disassembly used the original names. I've been changing the register names to the modern names, but missed that one. So it should probably be "W ES,BL", although I don't really like "BL" either. (Maybe "PM" would make more sense for plus/minus?) A bit more on the original register names. The original 8080-inspired registers XA, BC, DE, HL were renamed to AX, CX, DX, BX. The original registers MP, IJ, IK were renamed to BP, SI, DI.
- anyfoo 4y agoI forgot that it moves from DS:SI to ES:DI, but that's actually super interesting that the registers were named differently originally (and I did notice that the AX/BX/CX/DX order is weird before)... What were CS and SS called? DC and DS?
- kens 4y agoThe original segment registers were RC (code base), RD (data base), RS (stack base), and RA (alternate). I think the "R" is for "relocation register". But in the microcode, DA used the alternate segment, DD used the data segment, DS used the stack segment, and I don't think the microcode ever explicitly accessed the code segment. D0 accessed "segment 0" for interrupt vectors, etc. I don't know what "D" stands for. There's a diagram showing the original registers in the patent: https://patents.google.com/patent/US4449184A https://patents.google.com/patent/US4449184A
- anyfoo 4y agoSuper interesting, thanks. Another thing I just noticed: > Apparently a comprehensive solution (e.g. counting the prefixes or providing a buffer to hold prefixed during an interrupt) was impractical for the 8086. Did you have a particular kind of buffer in mind? The buffer could not be internal (i.e. not exposed to the programmer), because the interrupt handler itself could use string instructions. Or, it could just switch over to some other code entirely, and switch back much later. I guess since interrupts already push not just the usual CS:IP on the stack like a far call would, but also the FLAGS register, so that the special IRET could restore it, the x86 could also have pushed additional data describing the "prefix state"? Or maybe even try to cram it into the FLAGS bits that were still unused originally? With the 7 spare bits of the 8086, the 4 segment prefixes (of which only can be active at any time, so 2 bits), plus LOCK, would fit and leave 4 bits to spare.
- kens 4y agoI didn't think about a solution too deeply, but I was thinking of something like "shadow" prefix registers: when the chip takes an interrupt, copy the prefix latches to the shadow register, and then when you return from the interrupt, restore the prefixes from the shadow register. This would handle string operations in the interrupt handler but wouldn't handle nested interrupts. Your FLAGS solution would handle both since the state goes on the stack. It would be interesting to find out what the real solution was in later x86 processors. I'm sure someone has looked into this.
- ajenner 4y agoIt's not - the "DA" means that the write happens to the ES segment, while "DS" means that the read happens from the DS segment. The use of different segments for the source and destination gives these instructions extra flexibility.