Intel does have a pointer tagging feature called Linear Address Masking. Why it's called that I don't know. (On ARM it's called TBI/top byte ignore, on AMD it'

Intel does have a pointer tagging feature called Linear Address Masking. Why it's called that I don't know. (On ARM it's called TBI/top byte ignore, on AMD it's called UAI/upper address masking.) This is different from pointer signing which it doesn't have.