3 ms·

If memristors pan out they're likely to be the "next step forward" for the near future. There are some very big single-threaded wins to be had by incorporating

by chipsy 15y ago

If memristors pan out they're likely to be the "next step forward" for the near future. There are some very big single-threaded wins to be had by incorporating them into CPU design, even if it's a relatively brute-force integration into existing architecture like making a very large, fast cache.

FD3SA 15y ago
Precisely. These articles are inevitably too narrowly focused on the von Neuman architecture, which at this point is relatively old technology. Memrister computation architecture will be radically different, and orders of magnitude more powerful once they pass the initial economy of scale hurdle.
- lukeschlather 15y ago
  Even looking at the Von Neumann architecture, this paints an incomplete picture, only looking at the high-end chips. I would be interested to see some similar graphs looking at non-x86 architectures, not to mention comparing the Atom to the Celeron of 5 and 10 years ago, and other mid-range chips. Sure, power efficiency and speed has hit a wall around 4ghz, but 2ghz and 3ghz chips are still coming down significantly in cost and power consumption. And arguably, there's simply no market demand for chips faster than 3ghz, while cheaper and more efficient 2ghz chips are in very high demand. The sort of local applications where I notice latency are games and other things where GPUs are of course better suited to the task of decreasing latency. The only time I notice my CPU pegged are when an application has run away and would be using 100% CPU regardless, or when my CPU is attempting to do something that would be better suited to a GPU (video.)
- sliverstorm 15y ago
  Maybe I'm just locked into an old model, but I still haven't found anything or anyone who has actually been able to satisfactorily explain why they believe this to be the case, beyond "Because it will be!".
  - FD3SA 15y ago
    Perhaps this will convince you: http://youtu.be/bKGhvKyjgLY http://youtu.be/bKGhvKyjgLY
  - InclinedPlane 15y ago
    Quite plainly, memristors are the most exciting invention in electronics since the transistor. Our current understanding of memristors is that they have the capability to offer non-volatile storage at densities of flash or higher with speeds near that of SRAM. This alone provides several very simple implications. First, replacement of non-volatile storage systems with memristor based storage with much faster transfer speeds than what we have today. Second, replacement of main memory and CPU data and instruction caches with memristor storage. This would allow for systems that can be kept in "hibernation" for indefinite periods of time and transfer between being awake and being completely off in a matter of nanoseconds. This would vastly improve battery life for mobile devices and power efficiency for all devices. Additionally, it would vastly speed up the typical "fetch, process, write" cycle of most computations, improving overall computing power with equivalent logic hardware by huge margins. Imagine if programs didn't need to be loaded in memory because there was no difference between main memory and the "hard disk". Third, memristors can be used to create FPGA like devices which approach the space and power efficiency as well as performance of custom ASICs. That is a revolutionary concept. Imagine if you had a bank of programmable logic the size of your graphic card's GPU capable of transforming itself in a fraction of a second between given hardware configurations. That alone would fundamentally change computing as we know it. Fourth, potentially all of this stuff can be put onto a single chip, which would dramatically lower the cost and further shrink the size of a computer system, making them even more ubiquitous than they are today. Imagine a sliver of silicon only a few square centimeters in size containing an entire CPU, plus gigabytes of L2 cache, plus reconfigurable logic with the power of a GPU, plus terabytes of non-volatile storage that also serves as RAM. Here's the kicker, all of these things are just trivial applications of memristor technology, but the revolutionary stuff is even more astounding. Memristors are capable of being used for logic on their own, much like transistors. And it seems to be trivial to alternate between using them for memory or using them for logic. Potentially you could create a single chip containing terabytes or even petabytes of memristors and the components of the chip could easily transition between configurable logic (in a different way than the FPGA like devices mentioned above) and memory, allowing the chip to match computing power to available resources and position computing elements close to the data being used for optimal parallelism and minimum latency. Not to mention that it would enable non-von-Neumann computing architectures. The implications of this are far too heady for us to grapple with today, it implies the potential for much more advanced machine learning systems and vastly more powerful computational resources than we have ever dealt with before.
pjscott 15y ago
Hell, even just using die-stacking to put a really big DRAM cache right next to the CPU could be a big win if they can pull it off in bulk. Memory latency is a killer.
- Tuna-Fish 15y ago
  Putting a really big DRAM cache right next to the CPU would not actually help all that much. The reason DRAM is so slow is because selecting, sensing and amplifying is slow, not because it's far away. It's still so far away just because adding 30% bus latency doesn't sting enough to bring it closer. If you want to reduce latency, what you want is SRAM (expensive), or one of the experimental memory technologies that scales to SRAM-like latencies. The most immediate candidate is T-Ram, which has access latency of <2x 6T-SRAM, is nearly as dense as DRAM, and is presently on the roadmap for mass production for the 32/22nm GlobalFoundries processes. Putting DRAM on-package or on-die would give nice boosts to bandwidth. It could really help integrated graphics.

by chipsy 15y ago

FD3SA 15y ago

Precisely. These articles are inevitably too narrowly focused on the von Neuman architecture, which at this point is relatively old technology. Memrister computation architecture will be radically different, and orders of magnitude more powerful once they pass the initial economy of scale hurdle.

lukeschlather 15y ago
Even looking at the Von Neumann architecture, this paints an incomplete picture, only looking at the high-end chips. I would be interested to see some similar graphs looking at non-x86 architectures, not to mention comparing the Atom to the Celeron of 5 and 10 years ago, and other mid-range chips. Sure, power efficiency and speed has hit a wall around 4ghz, but 2ghz and 3ghz chips are still coming down significantly in cost and power consumption. And arguably, there's simply no market demand for chips faster than 3ghz, while cheaper and more efficient 2ghz chips are in very high demand. The sort of local applications where I notice latency are games and other things where GPUs are of course better suited to the task of decreasing latency. The only time I notice my CPU pegged are when an application has run away and would be using 100% CPU regardless, or when my CPU is attempting to do something that would be better suited to a GPU (video.)
sliverstorm 15y ago
Maybe I'm just locked into an old model, but I still haven't found anything or anyone who has actually been able to satisfactorily explain why they believe this to be the case, beyond "Because it will be!".
- FD3SA 15y ago
  Perhaps this will convince you: http://youtu.be/bKGhvKyjgLY http://youtu.be/bKGhvKyjgLY
- InclinedPlane 15y ago
  Quite plainly, memristors are the most exciting invention in electronics since the transistor. Our current understanding of memristors is that they have the capability to offer non-volatile storage at densities of flash or higher with speeds near that of SRAM. This alone provides several very simple implications. First, replacement of non-volatile storage systems with memristor based storage with much faster transfer speeds than what we have today. Second, replacement of main memory and CPU data and instruction caches with memristor storage. This would allow for systems that can be kept in "hibernation" for indefinite periods of time and transfer between being awake and being completely off in a matter of nanoseconds. This would vastly improve battery life for mobile devices and power efficiency for all devices. Additionally, it would vastly speed up the typical "fetch, process, write" cycle of most computations, improving overall computing power with equivalent logic hardware by huge margins. Imagine if programs didn't need to be loaded in memory because there was no difference between main memory and the "hard disk". Third, memristors can be used to create FPGA like devices which approach the space and power efficiency as well as performance of custom ASICs. That is a revolutionary concept. Imagine if you had a bank of programmable logic the size of your graphic card's GPU capable of transforming itself in a fraction of a second between given hardware configurations. That alone would fundamentally change computing as we know it. Fourth, potentially all of this stuff can be put onto a single chip, which would dramatically lower the cost and further shrink the size of a computer system, making them even more ubiquitous than they are today. Imagine a sliver of silicon only a few square centimeters in size containing an entire CPU, plus gigabytes of L2 cache, plus reconfigurable logic with the power of a GPU, plus terabytes of non-volatile storage that also serves as RAM. Here's the kicker, all of these things are just trivial applications of memristor technology, but the revolutionary stuff is even more astounding. Memristors are capable of being used for logic on their own, much like transistors. And it seems to be trivial to alternate between using them for memory or using them for logic. Potentially you could create a single chip containing terabytes or even petabytes of memristors and the components of the chip could easily transition between configurable logic (in a different way than the FPGA like devices mentioned above) and memory, allowing the chip to match computing power to available resources and position computing elements close to the data being used for optimal parallelism and minimum latency. Not to mention that it would enable non-von-Neumann computing architectures. The implications of this are far too heady for us to grapple with today, it implies the potential for much more advanced machine learning systems and vastly more powerful computational resources than we have ever dealt with before.

pjscott 15y ago

Hell, even just using die-stacking to put a really big DRAM cache right next to the CPU could be a big win if they can pull it off in bulk. Memory latency is a killer.

Tuna-Fish 15y ago
Putting a really big DRAM cache right next to the CPU would not actually help all that much. The reason DRAM is so slow is because selecting, sensing and amplifying is slow, not because it's far away. It's still so far away just because adding 30% bus latency doesn't sting enough to bring it closer. If you want to reduce latency, what you want is SRAM (expensive), or one of the experimental memory technologies that scales to SRAM-like latencies. The most immediate candidate is T-Ram, which has access latency of <2x 6T-SRAM, is nearly as dense as DRAM, and is presently on the roadmap for mass production for the 32/22nm GlobalFoundries processes. Putting DRAM on-package or on-die would give nice boosts to bandwidth. It could really help integrated graphics.