4 ms·

TL;DR (i didn't do a deep dive, just a skim) they've laid out a chip into a grid of small areas and you can submit a design for one of the areas. Then they make

TL;DR (i didn't do a deep dive, just a skim) they've laid out a chip into a grid of small areas and you can submit a design for one of the areas. Then they make a chip that has everybody's designs on them, so when you get your chip it has your design, and everybody else's that you can play with. The areas each have room for about 400 gates in which people have built stuff like a 4 bit CPU. An area in one corner is the "master scheduler", it multiplexes and delivers 8 bit input sequentially to each area, and gathers 8 bit outputs from each area, at the rate of about 15khz. using all their tools and documentation to create your design is free, at a certain point when it gets to committing they have a pricing scheme which is intended to be affordable. (note: they've been doing versions of this, the last one was tape out 2, now is tape out 3, and I was not careful about checking which version specs I was skimming so perhaps the new one is more capacious or the last one less.) from https://hackaday.com/2023/02/14/supercon-2022-matt-venns-tiny-tapeout-brings-chip-design-to-the-masses/ https://hackaday.com/2023/02/14/supercon-2022-matt-venns-tin... personally, I think it would be just a bit cooler to have a dual channel 40kHz system that could do DSP on high quality audio, but you can do plenty with this

actionfromafar 4y ago
I was excited until I saw how you interface with your "corner". It's so slow. It's a shame, I wonder if there could be some other way?
- fsckboy 4y ago
  actually, combining what i said with what you said got me to a new idea: if the different areas on the chip were sharing inputs and possibly outputs, even with the same bandwidth tech, it would be much higher bandwidth as a group. So, for example, have a whole tape-out project devoted to something like a modular music-sampler/synthesizer. So, there's D/A A/D of a few audio/midi streams coming in, which every area of the chip gets as a feed, but also areas can talk to their neighbors directly without multiplexing, and then mixers, filters and group output. Maybe some way to "roll your own multiplexer" so somebody could use the whole chip for a variety of guitar pedals, somebody else a vocal processor, etc.
  - jschveibinz 4y ago
    Yes. This needs to be done!
Taniwha 4y ago
I submitted 2 CPUs to TT2 and a PDP8 (12 bits) to the current TT3. The major limitations are the relatively small number of gates, and the external interface (8 inputs including clock/reset, and 8 outputs) - and the external multiplexor which essentially limits clock frequencies to tens of kilohertz. TT4 and later will have a redesigned pin interface and likely have roughly twice as many external pins and far faster clocks - a lot of my designs are gates spent talking over that tiny interface
- Taniwha 4y ago
  I'll also note that all Tiny Tapeout projects are hosted on github and you can browse through them if you want to see how they're done
- userbinator 4y ago
  and the external interface (8 inputs including clock/reset, and 8 outputs) That's around the same amount of I/O as an Intel 4004.
- Gordonjcp 4y ago
  > and a PDP8 (12 bits) Interested. Is this going to be something like the Intersil 6120?
  - Taniwha 4y ago
    Probably a bit smaller - and doesn't have a multiplier/divider (it does have the minimal MQ register instructions), and it has a minimal IO interface In some sense it's a toy because the TT internal clock is so slow and it needs to run 5 clocks/memory cycle because of the tiny bus interface - ideally in say TT 4 with ~16 bits each way in the IO bus we could actually make something that could outperform an original PDP8 You can find it here: https://github.com/MoonbaseOtago/tt03-pdp8/blob/main/src/cpu.v https://github.com/MoonbaseOtago/tt03-pdp8/blob/main/src/cpu...
codedokode 4y ago
Why do they use large slow shift register for I/O? Cannot it be done the other way, for example: use parallel inputs and supply them to all designs simultaneously, and use large 250x1 multiplexer to read outputs? Also one can reuse that shift register as 250 bytes of sequential access memory, although I guess this technology which has been used in Soviet calculators has been long forgotten.
- Taniwha 4y ago
  I don't know the original reason for choosing the shift register, might have been that it involved lots of short wires between flops so the timing is easier to get right - but essentially they will switching to the big mux/etc next time around

actionfromafar 4y ago

I was excited until I saw how you interface with your "corner". It's so slow. It's a shame, I wonder if there could be some other way?

fsckboy 4y ago
actually, combining what i said with what you said got me to a new idea: if the different areas on the chip were sharing inputs and possibly outputs, even with the same bandwidth tech, it would be much higher bandwidth as a group. So, for example, have a whole tape-out project devoted to something like a modular music-sampler/synthesizer. So, there's D/A A/D of a few audio/midi streams coming in, which every area of the chip gets as a feed, but also areas can talk to their neighbors directly without multiplexing, and then mixers, filters and group output. Maybe some way to "roll your own multiplexer" so somebody could use the whole chip for a variety of guitar pedals, somebody else a vocal processor, etc.
- jschveibinz 4y ago
  Yes. This needs to be done!

Taniwha 4y ago

I submitted 2 CPUs to TT2 and a PDP8 (12 bits) to the current TT3. The major limitations are the relatively small number of gates, and the external interface (8 inputs including clock/reset, and 8 outputs) - and the external multiplexor which essentially limits clock frequencies to tens of kilohertz. TT4 and later will have a redesigned pin interface and likely have roughly twice as many external pins and far faster clocks - a lot of my designs are gates spent talking over that tiny interface

Taniwha 4y ago
I'll also note that all Tiny Tapeout projects are hosted on github and you can browse through them if you want to see how they're done
userbinator 4y ago
and the external interface (8 inputs including clock/reset, and 8 outputs) That's around the same amount of I/O as an Intel 4004.
Gordonjcp 4y ago
> and a PDP8 (12 bits) Interested. Is this going to be something like the Intersil 6120?
- Taniwha 4y ago
  Probably a bit smaller - and doesn't have a multiplier/divider (it does have the minimal MQ register instructions), and it has a minimal IO interface In some sense it's a toy because the TT internal clock is so slow and it needs to run 5 clocks/memory cycle because of the tiny bus interface - ideally in say TT 4 with ~16 bits each way in the IO bus we could actually make something that could outperform an original PDP8 You can find it here: https://github.com/MoonbaseOtago/tt03-pdp8/blob/main/src/cpu.v https://github.com/MoonbaseOtago/tt03-pdp8/blob/main/src/cpu...

codedokode 4y ago

Why do they use large slow shift register for I/O? Cannot it be done the other way, for example: use parallel inputs and supply them to all designs simultaneously, and use large 250x1 multiplexer to read outputs? Also one can reuse that shift register as 250 bytes of sequential access memory, although I guess this technology which has been used in Soviet calculators has been long forgotten.

Taniwha 4y ago
I don't know the original reason for choosing the shift register, might have been that it involved lots of short wires between flops so the timing is easier to get right - but essentially they will switching to the big mux/etc next time around