> the double-sigma (ΣΣ) sign added on early 386s after they had been tested bug-free from the infamous 32-bit multiplier bug I hadn't heard about this, I think

> the double-sigma (ΣΣ) sign added on early 386s after they had been tested bug-free from the infamous 32-bit multiplier bug I hadn't heard about this, I think this is what's being discussed here: https://groups.google.com/g/comp.arch/c/qm7FVR_YV4A/m/P97XlCVS_IsJ https://groups.google.com/g/comp.arch/c/qm7FVR_YV4A/m/P97XlC... > Contrary to industry speculation, the 80386 multiplier errors result from a layout problem, not from an error in logic design. "We didn't allow enough margin to catch the worst-case pattern in the multiplier at the corners of our process," explains Dana Krelle, Intel's 80386 marketing manager. "As a result, some chips, at some temperature/ voltage/frequency points, will produce errors from particular combinations of 32-bit operands." The error, apparently due to unintentional coupling between adjacent cells in the multiplier, escaped Intel's simulation and chip verification process until it was spotted in a subsequent stress-testing program.'