"What's the ULPMark (power benchmark) on any of those SiFive RISC-V chips?" SiFive, like ARM, doesn't make chips, they license cores to people who make chips.

"What's the ULPMark (power benchmark) on any of those SiFive RISC-V chips?" SiFive, like ARM, doesn't make chips, they license cores to people who make chips. The power characteristics are up to the chip designer -- what node they use, which "corner" of that node they use, and various other chip design features -- and not the core designer. I don't know of anyone who is putting out stand-alone microcontroller chips using SiFive cores. They've been concentrating on getting them into larger systems. For example Qualcomm said a few months ago they've shipped 650 million SoCs (i.e. Snapdragon XXX) with RISC-V cores in them (probably SiFive as they're a SiFive investor). The closest I know of (using SiFive cores) would be the Bouffalo Lab chips, but they are not just microcontrollers but WIFI/BlueTooth which of course by their very nature use considerable power. The BL602 datasheet says it uses 500 nA in "hibernate" (RTC or GPIO wakeup) and the CPU 22 mA at 192 MHz with radios off, so 115 µA/MHz. Certainly not in the league you quote. Well, actually ... I just looked and the STM32U5 datasheet says 440 nA "standby" with RTC or GPIO wakeup, so actually 440 vs 500 is not all that different, comparing apples to apples.