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Tilera preps many-cored Gx chips for March launch
- josephcooney 15y agoThey Rock? - For what? And relative to what? I must be a bit thick....
- corin_ 15y agoNope, you're just reading a submission with a badly-altered headline. Just imagine it saying "Tilera preps many-cored Gx chips for March launch" and you'll be fine.
- paranoidgeek 15y agoApparently these CPUs support ECC RAM (and plenty of it), which hopefully will get them the customers that were turned off the Atom based clusters with 4GB per dual core of non ECC RAM.
- justincormack 15y agoWith 100 cores you probabky need a very large amount of ram for most applications.
- rbanffy 15y agoIt depends mostly on the size of the data you'll be using. Pages containing code are usually few in comparison with pages containing data. The biggest hurdle is to prevent 100 little processors from starving - the memory bus will either be insanely wide or insanely busy. I'll have to do some math to find out how many cores could fit into a single chip provided each core had, say, 2 GB of RAM to itself, behaving not as a processor in a single-image but as a node in a distributed computer. We could even provide it with a more interesting memory architecture, with the lower 2GB being non-shared and the rest of the memory space being drawn from a shared pool of memory, with chunks allocated exclusively to any given core.
- gcp 15y agoAny word on what real general purpose computing capability those things have? 100 cores at 1.5Ghz is pretty useless as a performance indicator, especially given that it's not a known micro-architecture. I inquired at Tilera a while ago about this and I got zero response back. Not exactly a good sign.
- yvdriess 15y agoHow would you compare its performance? It would do really bad on the SPEC benchmarks for example. Some parallel algorithms would do well on Tilera. If not in absolute speed, at least in FLOPS/Watt
- gcp 15y agoIt would do really bad on the SPEC benchmarks for example. That's what I'd expect. But "bad" * 100 might still be good. Or more realistically, "bad" * scaling * 100 might be acceptable. But without data, it's anybodies guess.
- yvdriess 15y agoI meant bad for the entire Tilera processor. I haven't found any SPEC results for a Tilera processor, but we've been experimenting with a TilePro64 in out research lab for a while: http://soft.vub.ac.be/~smarr/2010/11/roarvm-the-manycore-squeakvm/ http://soft.vub.ac.be/~smarr/2010/11/roarvm-the-manycore-squ...
- dkersten 15y agoI also inquired at Tilera and they were very quick to respond and very helpful, answering questions over email and over the phone (I had multiple phone conversations with one of the guys on this page: http://www.tilera.com/about_tilera/management http://www.tilera.com/about_tilera/management I won't say who though). It may have helped that I was inquiring on behalf of the telecoms company I worked for at the time. I was inquiring about their 64 core PCIe cards (this was a few years ago, before they had 100 core ones). From what I understood, they run (or at least, can run) Linux and most things will run just fine with a recompile (though obviously not making the best use of the available cores). They also said that their team would help port our software (which was a mixture of highly multi-threaded Java and C++) as part of the development kit cost. I think the devkit cost ten to twenty K US$ (I don't remember the exact number) and the individual cards cost between about 2K and 10K depending on the specs and quantity ordered. Unfortunately, I don't really remember the technical details any more. I do remember that they would have been a great fit for what we were doing (processing SMS messages, each one can be easily processed in parallel with only a small bit of shared state), but my boss pulled the plug because we managed to reach our performance goals with commodity hardware while I was still talking to Tilera.
- ck2 15y ago2020 is going to be an amazing decade if we have this before this one ends. 100 cores @ 1.5ghz with only 55watt power draw? As long as they get almost the same done in a clock cycle as arm or atom cpu, this is going to be mind blowing.
- willvarfar 15y agosingle-system-image too!
- rbanffy 15y agoIt'd be an incredibly interesting project to make desktop OSs and software run well on processors like this or Sun's T4... My netbook pretends to have 2 cores, my notebook, 4 and the servers I deploy to have 40 cores pretending to be 80... Core count won't go down anytime soon.
- rwmj 15y agoI don't understand the memory architecture of this, which would seem to be critical for making this fast with existing software. Are edge nodes connected directly to memory? And if so, how much, what configuration? And do interior nodes have to rely on hypertransport-like messages to access memory? What's the latency from a node in the middle to main memory? How much cache do the nodes have to cope with this?