It doesn't. This implementation has a very incompatible (and problematic) deviation from the privileged ISA spec. It seems to act as if there was a hardcoded,

It doesn't. This implementation has a very incompatible (and problematic) deviation from the privileged ISA spec. It seems to act as if there was a hardcoded, stuck, TLB entry that cannot be removed, so the whole system has to work around it. And to add insult to injury, it affects a virtual memory address range that happens to be used in most Linux programs. IMHO ASUS is doing a disservice to RISC-V by releasing a board with such a chip. They should have used something else or skipped this generation.