But if you have IO fast enough to do direct 100Mbps Ethernet, you can do GMII or RGMII to a gigabit PHY (or a parallel to serial converter to talk to an SFP). I

But if you have IO fast enough to do direct 100Mbps Ethernet, you can do GMII or RGMII to a gigabit PHY (or a parallel to serial converter to talk to an SFP). I think the project here goes through MII internally anyway (I only skimmed it) so it would actually take more space on the FPGA fabric than using a PHY… So apart from being fun, maybe the main benefit would be less board space because it doesn’t need the PHY chip? (But also potentially lots of disadvantages practically).