3 ms·
>NXP i.MX8M Plus >Cortex-A53 The SoC uses a microarchitecture that implements the legacy proprietary ISA (ARM), yet is much slower than the RISC-V SiFive U74,
by snvzz 4y ago
>NXP i.MX8M Plus
>Cortex-A53
The SoC uses a microarchitecture that implements the legacy proprietary ISA (ARM), yet is much slower than the RISC-V SiFive U74, which is already available in SoCs such as the JH7110 used in VisionFive 2.
Sad choice in 2023. I'll be skipping this otherwise appealing device. Maybe a future cpu module will be based on a SoC based on the open standard ISA.
- Taniwha 4y agoThere are a whole lot of different imx8s some better some worse, FWIW I think they're using this module (4+1 core 1.8GHz): https://boundarydevices.com/product/nitrogen8m-plus-som/ https://boundarydevices.com/product/nitrogen8m-plus-som/ It's a plug in module plugged into another plug in module, no reason why you couldn't hack up a RISC-V upgrade here
- snvzz 4y agoHopefully we'll get a RISC-V module at some point. RISC-V got strong enough that I am not looking at ARM options anymore.
- slondr 4y agoFrom the original Reform product page: > We selected their "Nitrogen8M SOM" module for Reform because it is the only available module for which you can download the complete schematics and understand what every component does. There are also a number of community SOM projects for the original which should work with the Pocket, including a raspberry pi CM4, and a Layerscape 1028A
- stonogo 4y agoYou're comparing a 5W CPU to an entire SoM that only draws 2W. Just making that switch cuts battery life to a little over an hour in this device. You're also comparing a SiFive product whose documentation is mostly "this document will be updated soon" to a product that comes with complete schematics and all the documentation you could ask for. I don't think you understand the design considerations at play here.
- snvzz 4y ago>You're comparing a 5W CPU to an entire SoM that only draws 2W. JH7110 is not a CPU, but a fully featured SoC. The power consumption is like: >In sleep mode, the static power consumption of JH7110 is 120 mW. When working on an SBC, with all the main modules under full load, the dynamic power consumption of JH7110 is 4,100 mW. Source: https://www.design-reuse.com/news/52544/starfive-risc-v-jh7110-soc-visionfive-2-sbc.html https://www.design-reuse.com/news/52544/starfive-risc-v-jh71...
- stonogo 4y agoGranted. So power consumption is "only" doubled from the existing product and runtime is "only" cut in half. The benefit is that the project is now harder to execute and the BOM is more expensive, assuming you can get through the lack of documentation. It's still a bad fit.
- snvzz 4y agoWe'd need to know what the actual load is with both chips. That 4.1w figure is a maximum, using all the SoC's modules, at the spec clock. To put in perspective, the NXP's SoC 2.1w figure is just for the CPU[0]. 0. https://www.nxp.com/docs/en/fact-sheet/IMX8MPLUSFS.pdf https://www.nxp.com/docs/en/fact-sheet/IMX8MPLUSFS.pdf