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Is this some image of how the devices you'd build with SRAM (ie. big uniform array of bitcells) are very regular? I feel like logic being not-as-uniform makes t
by eigenform 4y ago
Is this some image of how the devices you'd build with SRAM (ie. big uniform array of bitcells) are very regular? I feel like logic being not-as-uniform makes the talk about density scaling different, but I can't exactly articulate how
- trsohmers 4y agoIt’s in large part due to the wire density… a 6T SRAM bit cell by itself could scale transistor density well, but the word lines and bit lines are the limiters as they typically have to go up 4 metal layers. Also, each read/write port you add to the SRAM macro increases the size exponentially rather than the linear scaling of the bit cells.
- eigenform 4y agoI see! Thanks for finishing the thought!