3 ms·
Also it's not obvious that it works the other way. The only requirement of the flash reset operation is that it consistently causes bits to read as 1 and that
by bcoates 4y ago
Also it's not obvious that it works the other way.
The only requirement of the flash reset operation is that it consistently causes bits to read as 1 and that the normal write operation allows them to read as 0 again; it doesn't actually follow from that that an erased-but-not-reprogrammed block will have cell charge levels that are indistinguishable from each other based on the pre-erasure charge level.